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Message-ID: <alpine.DEB.2.10.1401100852140.32591@vincent-weaver-1.um.maine.edu>
Date: Fri, 10 Jan 2014 08:54:38 -0500 (EST)
From: Vince Weaver <vincent.weaver@...ne.edu>
To: eranian@...il.com
cc: Will Deacon <will.deacon@....com>,
Vince Weaver <vincent.weaver@...ne.edu>,
Chad Paradis <chad.paradis@...t.maine.edu>,
Peter Zijlstra <peterz@...radead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Paul Mackerras <paulus@...ba.org>,
Ingo Molnar <mingo@...hat.com>,
Arnaldo Carvalho de Melo <acme@...stprotocols.net>
Subject: Re: [patch/rfc] perf on raspberry-pi without overflow interrupt
On Fri, 10 Jan 2014, Stephane Eranian wrote:
> But before we do that, can someone confirm that on Pi there is simply
> no interrupt
> generated by the PMU or is it that we don't know how to route it back?
The closest I've seen is this posting from one of the rasp-pi employees
who presumably has access to better documentation than we do:
http://www.raspberrypi.org/phpBB3/viewtopic.php?f=33&t=19151
It sounds like the SoC just doesn't bother hooking the nPMUIRQ line up
anything useful on the interrupt controller. The Pi is complicated
because it's really just a GPU chip that just happens to have an ARM1176
core hanging off the side of it.
Vince
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