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Message-Id: <aafcdb22f04e2d3188d2938528939481be56b649.1389608855.git.baruch@tkos.co.il>
Date: Mon, 13 Jan 2014 12:27:35 +0200
From: Baruch Siach <baruch@...s.co.il>
To: Peter Zijlstra <a.p.zijlstra@...llo.nl>,
Paul Mackerras <paulus@...ba.org>,
Ingo Molnar <mingo@...hat.com>,
Arnaldo Carvalho de Melo <acme@...stprotocols.net>
Cc: linux-kernel@...r.kernel.org, linux-xtensa@...ux-xtensa.org,
Baruch Siach <baruch@...s.co.il>
Subject: [PATCH v3] perf: add support for the xtensa architecture
Tested using kernel tracepoints on a QEMU simulated environment. Kernel support
for perf depends on the patch "xtensa: enable HAVE_PERF_EVENTS", which is
scheduled for v3.14. Hardware performance counters are not supported under
xtensa yet.
Acked-by: Max Filippov <jcmvbkbc@...il.com>
Signed-off-by: Baruch Siach <baruch@...s.co.il>
---
v2: use the "core ID" field from /proc/cpuinfo (Max Filippov)
v3: add testing and kernel dependency information (Ingo Molnar)
---
tools/perf/perf.h | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/tools/perf/perf.h b/tools/perf/perf.h
index b079304bd53d..e441864dbe03 100644
--- a/tools/perf/perf.h
+++ b/tools/perf/perf.h
@@ -132,6 +132,13 @@
#define CPUINFO_PROC "CPU"
#endif
+#ifdef __xtensa__
+#define mb() asm volatile("memw" ::: "memory")
+#define wmb() asm volatile("memw" ::: "memory")
+#define rmb() asm volatile("" ::: "memory")
+#define CPUINFO_PROC "core ID"
+#endif
+
#define barrier() asm volatile ("" ::: "memory")
#ifndef cpu_relax
--
1.8.5.2
--
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