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Message-ID: <20140114134528.GG15567@sirena.org.uk>
Date:	Tue, 14 Jan 2014 13:45:28 +0000
From:	Mark Brown <broonie@...nel.org>
To:	Geert Uytterhoeven <geert@...ux-m68k.org>
Cc:	linux-spi@...r.kernel.org,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	Geert Uytterhoeven <geert+renesas@...ux-m68k.org>
Subject: Re: [PATCH/RFC] spi: core: Fix logic mismatch in spi_master.set_cs()

On Tue, Jan 14, 2014 at 02:23:37PM +0100, Geert Uytterhoeven wrote:
> On Tue, Jan 14, 2014 at 1:52 PM, Mark Brown <broonie@...nel.org> wrote:
> >On Tue, Jan 14, 2014 at 12:36:51PM +0100, Geert Uytterhoeven wrote:

> > This also pushes the handling of CS_HIGH back out into the driver which
> > doesn't seem like it's helping anything.  Flipping the sense of enable

> It depends: on hardware with separate register bits for chip select polarity
> and chip select assertion it avoids having to invert the enable value a second
> time.

If we're manually setting /CS it really makes no difference what the
chip thinks the polarity is - something that is controlling /CS
autonomously can't implement this operation and something that can just
set it at any time doesn't need to worry if the chip thinks it's
asserted or not.

> > when calling set_cs() is probably OK though.

> Just flipping the sense of enable still needs a documentation update.

Huh?  Why were you updating the code then...

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