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Message-ID: <20140117005437.GQ17314@sirena.org.uk>
Date:	Fri, 17 Jan 2014 00:54:37 +0000
From:	Mark Brown <broonie@...nel.org>
To:	Daniel Matuschek <daniel@...uschek.net>
Cc:	alsa-devel@...a-project.org, Dimitris.Papastamos@...fsonmicro.com,
	lgirdwood@...il.com, perex@...ex.cz, tiwai@...e.de,
	patches@...nsource.wolfsonmicro.com, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] ASoC: wm8804: Allow control of master clock divider in
 PLL generation

On Tue, Jan 14, 2014 at 08:34:10PM +0100, Daniel Matuschek wrote:
> WM8804 can run with PLL frequencies of 256xfs and 128xfs for
> most sample rates. At 192kHz only 128xfs is supported. The
> existing driver selects 128xfs automatically for some lower

Charles (or someone else from Wolfson), you commented on previous
versions of this - are you still OK with it?

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