lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <1389961514-13562-13-git-send-email-hanjun.guo@linaro.org>
Date:	Fri, 17 Jan 2014 20:25:06 +0800
From:	Hanjun Guo <hanjun.guo@...aro.org>
To:	"Rafael J. Wysocki" <rjw@...ysocki.net>,
	Catalin Marinas <catalin.marinas@....com>,
	Will Deacon <will.deacon@....com>,
	Russell King - ARM Linux <linux@....linux.org.uk>
Cc:	linux-acpi@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
	Grant Likely <grant.likely@...aro.org>,
	Matthew Garrett <mjg59@...f.ucam.org>,
	Olof Johansson <olof@...om.net>,
	Linus Walleij <linus.walleij@...aro.org>,
	Bjorn Helgaas <bhelgaas@...gle.com>,
	Rob Herring <robh@...nel.org>,
	Mark Rutland <mark.rutland@....com>,
	Arnd Bergmann <arnd@...db.de>, patches@...aro.org,
	linux-kernel@...r.kernel.org, linaro-kernel@...ts.linaro.org,
	linaro-acpi@...ts.linaro.org, Charles.Garcia-Tobin@....com,
	Hanjun Guo <hanjun.guo@...aro.org>
Subject: [PATCH 12/20] ARM64 / ACPI: Use Parked Address in GIC structure for spin table SMP initialisation

Parked Address in GIC structure can be used as cpu release address
for spin table SMP initialisation.

This patch gets parked address from MADT and use it for SMP
initialisation when DT is not available.

Signed-off-by: Hanjun Guo <hanjun.guo@...aro.org>
---
 arch/arm64/include/asm/acpi.h      |    7 +++++++
 arch/arm64/kernel/smp_spin_table.c |   12 ++++++++----
 drivers/acpi/plat/arm-core.c       |   24 +++++++++++++++++++++++-
 3 files changed, 38 insertions(+), 5 deletions(-)

diff --git a/arch/arm64/include/asm/acpi.h b/arch/arm64/include/asm/acpi.h
index 097394c..856a2e7 100644
--- a/arch/arm64/include/asm/acpi.h
+++ b/arch/arm64/include/asm/acpi.h
@@ -89,6 +89,8 @@ extern int arm_cpu_to_apicid[NR_CPUS];
 
 extern const char *acpi_get_enable_method(int cpu);
 
+extern int acpi_get_cpu_release_address(int cpu, u64 *release_address);
+
 #else	/* !CONFIG_ACPI */
 #define acpi_disabled 1		/* ACPI sometimes enabled on ARM */
 #define acpi_noirq 1		/* ACPI sometimes enabled on ARM */
@@ -100,6 +102,11 @@ static inline const char *acpi_get_enable_method(int cpu)
 	return NULL;
 }
 
+static inline int acpi_get_cpu_release_address(int cpu, u64 *release_address)
+{
+	return -ENODEV;
+}
+
 #endif
 
 #endif /*_ASM_ARM64_ACPI_H*/
diff --git a/arch/arm64/kernel/smp_spin_table.c b/arch/arm64/kernel/smp_spin_table.c
index 44c2280..ce86189 100644
--- a/arch/arm64/kernel/smp_spin_table.c
+++ b/arch/arm64/kernel/smp_spin_table.c
@@ -25,6 +25,7 @@
 #include <asm/cpu_ops.h>
 #include <asm/cputype.h>
 #include <asm/smp_plat.h>
+#include <asm/acpi.h>
 
 extern void secondary_holding_pen(void);
 volatile unsigned long secondary_holding_pen_release = INVALID_HWID;
@@ -47,7 +48,6 @@ static void write_pen_release(u64 val)
 	__flush_dcache_area(start, size);
 }
 
-
 static int smp_spin_table_cpu_init(struct device_node *dn, unsigned int cpu)
 {
 	/*
@@ -55,10 +55,14 @@ static int smp_spin_table_cpu_init(struct device_node *dn, unsigned int cpu)
 	 */
 	if (of_property_read_u64(dn, "cpu-release-addr",
 				 &cpu_release_addr[cpu])) {
-		pr_err("CPU %d: missing or invalid cpu-release-addr property\n",
-		       cpu);
 
-		return -1;
+		/* try ACPI way */
+		if (acpi_get_cpu_release_address(cpu, &cpu_release_addr[cpu])) {
+			pr_err("CPU %d: missing or invalid cpu-release-addr property\n",
+				cpu);
+
+			return -1;
+		}
 	}
 
 	return 0;
diff --git a/drivers/acpi/plat/arm-core.c b/drivers/acpi/plat/arm-core.c
index 2704633..7f1d709 100644
--- a/drivers/acpi/plat/arm-core.c
+++ b/drivers/acpi/plat/arm-core.c
@@ -60,6 +60,9 @@ static int available_cpus;
 int arm_cpu_to_apicid[NR_CPUS] = { [0 ... NR_CPUS-1] = -1 };
 static int boot_cpu_apic_id = -1;
 
+/* Parked Address in ACPI GIC structure */
+static u64 parked_address[NR_CPUS];
+
 #define BAD_MADT_ENTRY(entry, end) (					\
 	(!entry) || (unsigned long)entry + sizeof(*entry) > end ||	\
 	((struct acpi_subtable_header *)entry)->length < sizeof(*entry))
@@ -193,6 +196,7 @@ static int __init
 acpi_parse_gic(struct acpi_subtable_header *header, const unsigned long end)
 {
 	struct acpi_madt_generic_interrupt *processor = NULL;
+	int cpu;
 
 	processor = (struct acpi_madt_generic_interrupt *)header;
 
@@ -208,9 +212,16 @@ acpi_parse_gic(struct acpi_subtable_header *header, const unsigned long end)
 	 * to not preallocating memory for all NR_CPUS
 	 * when we use CPU hotplug.
 	 */
-	acpi_register_gic_cpu_interface(processor->gic_id,
+	cpu = acpi_register_gic_cpu_interface(processor->gic_id,
 			processor->flags & ACPI_MADT_ENABLED);
 
+	/*
+	 * We need the parked address for SMP initialization with
+	 * spin-table enable method
+	 */
+	if (cpu >= 0 && processor->parked_address)
+		parked_address[cpu] = processor->parked_address;
+
 	return 0;
 }
 
@@ -269,6 +280,17 @@ static int __init acpi_parse_madt_gic_entries(void)
 	return 0;
 }
 
+/* Parked Address in ACPI GIC structure can be used as cpu release addr */
+int acpi_get_cpu_release_address(int cpu, u64 *release_address)
+{
+	if (!release_address || !parked_address[cpu])
+		return -EINVAL;
+
+	*release_address = parked_address[cpu];
+
+	return 0;
+}
+
 /*
  * Parse GIC distributor related entries in MADT
  * returns 0 on success, < 0 on error
-- 
1.7.9.5

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ