linux-kernel - Re: [PATCH] dma: Add Xilinx AXI Video Direct Memory Access Engine driver support

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Date:	Fri, 17 Jan 2014 17:13:07 +0100
From:	Arnd Bergmann <arnd@...db.de>
To:	linux-arm-kernel@...ts.infradead.org
Cc:	Srikanth Thokala <sthokal@...inx.com>, dan.j.williams@...el.com,
	vinod.koul@...el.com, michal.simek@...inx.com,
	grant.likely@...aro.org, robh+dt@...nel.org,
	dmaengine@...r.kernel.org, devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH] dma: Add Xilinx AXI Video Direct Memory Access Engine driver support

On Thursday 16 January 2014, Srikanth Thokala wrote:
> @@ -0,0 +1,71 @@
> +Xilinx AXI VDMA engine, it does transfers between memory and video devices.
> +It can be configured to have one channel or two channels. If configured
> +as two channels, one is to transmit to the video device and another is
> +to receive from the video device.
> +
> +Required properties:
> +- compatible: Should be "xlnx,axi-vdma-1.00.a"
> +- #dma-cells: Should be <1>, see "dmas" property below
> +- reg: Should contain VDMA registers location and length.
> +- interrupts: Should contain per channel VDMA interrupts.
> +- compatible (child node): It should be either "xlnx,axi-vdma-mm2s-channel" or
> +       "xlnx,axi-vdma-s2mm-channel". It depends on the hardware design and it
> +       can also have both channels.
> +- xlnx,device-id: Should contain device number in each channel. It should be
> +       {0,1,2...so on} to the number of VDMA devices configured in hardware.
> +- xlnx,num-fstores: Should be the number of framebuffers as configured in h/w.
> +- xlnx,data-width: Should contain the stream data width, takes {32,64...so on}.
> +- xlnx,flush-fsync: (Optional) Tells whether which channel to Flush on Fsync.
> +       It takes following values:
> +       {1}, flush both channels
> +       {2}, flush mm2s channel
> +       {3}, flush s2mm channel
> +- xlnx,include-sg: (Optional) Tells whether configured for Scatter-mode in
> +       the hardware.
> +- xlnx,include-dre: (Optional) Tells whether hardware is configured for Data
> +       Realignment Engine.
> +- xlnx,genlock-mode: (Optional) Tells whether Genlock synchornisation is
> +       enabled/disabled in hardware.

The documentation doesn't seem to match the example, since you don't mention
the fact that the channels have separate nodes here, or which properties
are meant for the parent or the child node. Also, some of the "required"
properties are absent in the example, which makes no sense.

I also assume that some of the properties should just go away:

* xlnx,device-id should be the argument in the handle from the slave device
* data width should be a property of the slave driver that is configured
  through dma_slave_config(), unless you can have dma engines that only
  support certain a width.

	Arnd
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