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Message-ID: <tip-00e2bcd6d35f59fce7fa0e76e24d08f74c6a8506@git.kernel.org>
Date:	Sun, 19 Jan 2014 04:27:25 -0800
From:	tip-bot for Stephen Boyd <tipbot@...or.com>
To:	linux-tip-commits@...r.kernel.org
Cc:	linux-kernel@...r.kernel.org, hpa@...or.com, mingo@...nel.org,
	tglx@...utronix.de, maxime.ripard@...e-electrons.com,
	daniel.lezcano@...aro.org, sboyd@...eaurora.org
Subject: [tip:timers/core] clocksource: Timer-sun5i:
  Switch to sched_clock_register()

Commit-ID:  00e2bcd6d35f59fce7fa0e76e24d08f74c6a8506
Gitweb:     http://git.kernel.org/tip/00e2bcd6d35f59fce7fa0e76e24d08f74c6a8506
Author:     Stephen Boyd <sboyd@...eaurora.org>
AuthorDate: Thu, 16 Jan 2014 17:38:06 -0800
Committer:  Ingo Molnar <mingo@...nel.org>
CommitDate: Sun, 19 Jan 2014 13:23:23 +0100

clocksource: Timer-sun5i: Switch to sched_clock_register()

The 32-bit sched_clock() interface supports 64 bits since
3.13-rc1. Upgrade to the 64-bit function to allow us to remove
the 32-bit registration interface.

Signed-off-by: Stephen Boyd <sboyd@...eaurora.org>
Acked-by: Daniel Lezcano <daniel.lezcano@...aro.org>
Cc: Maxime Ripard <maxime.ripard@...e-electrons.com>
Cc: linux-arm-kernel@...ts.infradead.org
Link: http://lkml.kernel.org/r/1389922686-6249-1-git-send-email-sboyd@codeaurora.org
Signed-off-by: Ingo Molnar <mingo@...nel.org>
---
 drivers/clocksource/timer-sun5i.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/clocksource/timer-sun5i.c b/drivers/clocksource/timer-sun5i.c
index bddc522..deebcd6 100644
--- a/drivers/clocksource/timer-sun5i.c
+++ b/drivers/clocksource/timer-sun5i.c
@@ -136,7 +136,7 @@ static struct irqaction sun5i_timer_irq = {
 	.dev_id = &sun5i_clockevent,
 };
 
-static u32 sun5i_timer_sched_read(void)
+static u64 sun5i_timer_sched_read(void)
 {
 	return ~readl(timer_base + TIMER_CNTVAL_LO_REG(1));
 }
@@ -166,7 +166,7 @@ static void __init sun5i_timer_init(struct device_node *node)
 	writel(TIMER_CTL_ENABLE | TIMER_CTL_RELOAD,
 	       timer_base + TIMER_CTL_REG(1));
 
-	setup_sched_clock(sun5i_timer_sched_read, 32, rate);
+	sched_clock_register(sun5i_timer_sched_read, 32, rate);
 	clocksource_mmio_init(timer_base + TIMER_CNTVAL_LO_REG(1), node->name,
 			      rate, 340, 32, clocksource_mmio_readl_down);
 
--
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