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Message-ID: <20140122184511.GB389@x4>
Date: Wed, 22 Jan 2014 19:45:11 +0100
From: Markus Trippelsdorf <markus@...ppelsdorf.de>
To: Peter Zijlstra <peterz@...radead.org>
Cc: Sasha Levin <sasha.levin@...cle.com>,
Arjan van de Ven <arjan@...ux.intel.com>, lenb@...nel.org,
rjw@...ysocki.net, Eliezer Tamir <eliezer.tamir@...ux.intel.com>,
rui.zhang@...el.com, jacob.jun.pan@...ux.intel.com,
Mike Galbraith <bitbucket@...ine.de>,
Ingo Molnar <mingo@...nel.org>, hpa@...or.com,
paulmck@...ux.vnet.ibm.com, Thomas Gleixner <tglx@...utronix.de>,
John Stultz <john.stultz@...aro.org>,
Andy Lutomirski <luto@...capital.net>,
linux-kernel@...r.kernel.org, dyoung@...hat.com
Subject: Re: [PATCH 13/15] sched: Use a static_key for sched_clock_stable
On 2014.01.22 at 19:42 +0100, Peter Zijlstra wrote:
> On Wed, Jan 22, 2014 at 07:35:38PM +0100, Markus Trippelsdorf wrote:
>
> > >FYI it happens on real hardware on my machine:
>
> > >[ 60.375384] process: using AMD E400 aware idle routine
>
> > But this is a different issue. I've bisected it to:
> >
> > commit 20d1c86a57762f0a33a78988e3fc8818316badd4
> > Author: Peter Zijlstra <peterz@...radead.org>
> > Date: Fri Nov 29 15:40:29 2013 +0100
> >
> > sched/clock, x86: Rewrite cyc2ns() to avoid the need to disable IRQs
> >
> > Reverting the commit "fixes" the issue:
>
> Hurm.. what kind of AMD machine is that?
It's an ancient one:
processor : 0
vendor_id : AuthenticAMD
cpu family : 16
model : 4
model name : AMD Phenom(tm) II X4 955 Processor
stepping : 2
microcode : 0x10000db
cpu MHz : 800.000
cache size : 512 KB
physical id : 0
siblings : 4
core id : 0
cpu cores : 4
apicid : 0
initial apicid : 0
fpu : yes
fpu_exception : yes
cpuid level : 5
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm 3dnowext 3
dnow constant_tsc rep_good nopl nonstop_tsc extd_apicid pni monitor cx16 popcnt lahf_lm cmp_legacy svm extapic cr8_legacy abm sse4a misalignsse 3dnowprefetch osvw ibs skinit
wdt hw_pstate npt lbrv svm_lock nrip_save
bogomips : 6424.73
TLB size : 1024 4K pages
clflush size : 64
cache_alignment : 64
address sizes : 48 bits physical, 48 bits virtual
power management: ts ttp tm stc 100mhzsteps hwpstate
--
Markus
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