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Message-ID: <20140123150912.7ee822a0@alan.etchedpixels.co.uk>
Date:	Thu, 23 Jan 2014 15:09:12 +0000
From:	One Thousand Gnomes <gnomes@...rguk.ukuu.org.uk>
To:	Mika Westerberg <mika.westerberg@...ux.intel.com>
Cc:	linux-kernel@...r.kernel.org, Thomas Gleixner <tglx@...utronix.de>,
	Ingo Molnar <mingo@...hat.com>,
	"H. Peter Anvin" <hpa@...or.com>, Bin Gao <bin.gao@...el.com>,
	x86@...nel.org
Subject: Re: [PATCH] x86, tsc: Add missing Baytrail frequency to the table

On Thu, 23 Jan 2014 13:04:03 +0200
Mika Westerberg <mika.westerberg@...ux.intel.com> wrote:

> Baytrail is based on Silvermont core so MSR_FSB_FREQ[2:0] == 0 means that
> the CPU reference clock runs at 83.3MHz. Without this we crash a bit later
> with backtrace looking like:

Would it not be wise to also make the code robust against future failures
of this kind and at least bitch rather than divide by 0 ?

Alan
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