[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <52EB96BB.6070800@st.com>
Date: Fri, 31 Jan 2014 12:27:39 +0000
From: srinivas kandagatla <srinivas.kandagatla@...com>
To: Arnd Bergmann <arnd@...db.de>,
<linux-arm-kernel@...ts.infradead.org>
Cc: <devicetree@...r.kernel.org>,
Russell King <linux@....linux.org.uk>, <kernel@...inux.com>,
Linus Walleij <linus.walleij@...aro.org>,
Patrice CHOTARD <patrice.chotard@...com>,
<linux-kernel@...r.kernel.org>,
Stuart Menefy <stuart.menefy@...com>,
Rob Herring <robh+dt@...nel.org>,
Grant Likely <grant.likely@...aro.org>,
Giuseppe Cavallaro <peppe.cavallaro@...com>,
<maxime.coquelin@...com>, <alexandre.torgue@...com>
Subject: Re: [PATCH 1/4] ARM: STi: add stid127 soc support
Hi Arnd,
On 30/01/14 18:39, Arnd Bergmann wrote:
> Actually reading the code in this file shows that the L2 cache
> initialization is the only nonstandard thing in there. We should
> really find a way to get rid of the entire function.
I think this will get rid of lot of code left in board-dt.
>
> Sorry if I missed the initial review, but can you explain
> why this is needed to start with?
On ST SoCs the default value for L2 AUX_CTRL register is 0x0, so we set
the way-size explicit here.
Thanks,
srini
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Powered by blists - more mailing lists