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Message-Id: <1391779377-10176-1-git-send-email-acourbot@nvidia.com> Date: Fri, 7 Feb 2014 22:22:57 +0900 From: Alexandre Courbot <acourbot@...dia.com> To: Ben Skeggs <bskeggs@...hat.com>, nouveau@...ts.freedesktop.org Cc: dri-devel@...ts.freedesktop.org, linux-kernel@...r.kernel.org, gnurou@...il.com, Alexandre Courbot <acourbot@...dia.com> Subject: [PATCH] nouveau/drm/fifo: fix ENG_RUNLIST register address Address of the ENG_RUNLIST register should be 0x002284 + (engine * 8), not 0x002284 + (engine * 4). Signed-off-by: Alexandre Courbot <acourbot@...dia.com> --- Stumbled upon this one and I'm quite certain the offset was not correct. This is inconsequential for GK20A which only features one runlist, but other GPUs might run into troubles because of this. Not tested, just reported for your consideration. FWIW, the Android GK20A driver uses the same offset calculation. drivers/gpu/drm/nouveau/core/engine/fifo/nve0.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/nouveau/core/engine/fifo/nve0.c b/drivers/gpu/drm/nouveau/core/engine/fifo/nve0.c index 99c9dee..dbc3ff6 100644 --- a/drivers/gpu/drm/nouveau/core/engine/fifo/nve0.c +++ b/drivers/gpu/drm/nouveau/core/engine/fifo/nve0.c @@ -112,7 +112,7 @@ nve0_fifo_runlist_update(struct nve0_fifo_priv *priv, u32 engine) nv_wr32(priv, 0x002270, cur->addr >> 12); nv_wr32(priv, 0x002274, (engine << 20) | (p >> 3)); - if (!nv_wait(priv, 0x002284 + (engine * 4), 0x00100000, 0x00000000)) + if (!nv_wait(priv, 0x002284 + (engine * 8), 0x00100000, 0x00000000)) nv_error(priv, "runlist %d update timeout\n", engine); mutex_unlock(&nv_subdev(priv)->mutex); } -- 1.8.5.3 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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