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Message-ID: <20140210135845.GV26684@n2100.arm.linux.org.uk>
Date:	Mon, 10 Feb 2014 13:58:45 +0000
From:	Russell King - ARM Linux <linux@....linux.org.uk>
To:	Will Deacon <will.deacon@....com>
Cc:	Fabrice GASNIER <fabrice.gasnier@...com>,
	"u.kleine-koenig@...gutronix.de" <u.kleine-koenig@...gutronix.de>,
	Jonathan Austin <Jonathan.Austin@....com>,
	Catalin Marinas <Catalin.Marinas@....com>,
	"nico@...aro.org" <nico@...aro.org>,
	"sboyd@...eaurora.org" <sboyd@...eaurora.org>,
	Marc Zyngier <Marc.Zyngier@....com>,
	"ben.dooks@...ethink.co.uk" <ben.dooks@...ethink.co.uk>,
	"vgupta@...opsys.com" <vgupta@...opsys.com>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"maxime.coquelin@...com" <maxime.coquelin@...com>
Subject: Re: [RFC PATCH] ARM: Add imprecise abort enable/disable macro

On Fri, Feb 07, 2014 at 05:09:03PM +0000, Will Deacon wrote:
> On Fri, Feb 07, 2014 at 04:19:15PM +0000, Fabrice GASNIER wrote:
> > +#define local_abt_enable()					\
> > +	({							\
> > +		unsigned long temp;				\
> > +	__asm__ __volatile__(					\
> > +	"mrs	%0, cpsr		@ sta\n"		\
> > +"	bic	%0, %0, %1\n"					\
> > +"	msr	cpsr_c, %0"					\
> > +	: "=r" (temp)						\
> > +	: "r" (PSR_A_BIT)					\
> 
> Can you use "i" instead of a register for this constant?

As the PSR A bit isn't in bits 7-0, cpsr_c isn't what's required here.
It needs something different... that's why my previous patch for you
didn't work.

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