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Message-ID: <20140210185908.3374eaf6@skate>
Date: Mon, 10 Feb 2014 18:59:08 +0100
From: Thomas Petazzoni <thomas.petazzoni@...e-electrons.com>
To: Andrew Lunn <andrew@...n.ch>
Cc: Gregory CLEMENT <gregory.clement@...e-electrons.com>,
Mike Turquette <mturquette@...aro.org>,
Lior Amsalem <alior@...vell.com>,
Tawfik Bayouk <tawfik@...vell.com>, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, Nadav Haklai <nadavh@...vell.com>,
Ezequiel Garcia <ezequiel.garcia@...e-electrons.com>,
linux-arm-kernel@...ts.infradead.org,
Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>
Subject: Re: [PATCH 6/6] dt: Update binding information for mvebu gating
clocks with Armada 380/385
Dear Andrew Lunn,
On Mon, 10 Feb 2014 18:53:50 +0100, Andrew Lunn wrote:
> > +The following is a list of provided IDs for Armada 380/385:
> > +ID Clock Peripheral
> > +-----------------------------------
> > +0 audio Audio
> > +2 ge2 Gigabit Ethernet 2
> > +3 ge1 Gigabit Ethernet 1
> > +4 ge0 Gigabit Ethernet 0
> > +5 pex1 PCIe 1
> > +6 pex2 PCIe 2
> > +7 pex3 PCIe 3
> > +8 pex4 PCIe 0
>
> Is that last one a typo? It at least looks a bit odd.
Right, this should be:
8 pex0 PCIe 0
(just checked again in the datasheet)
Thomas
--
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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