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Message-Id: <C8E65D93-F685-40C7-A482-C3E85D9F0558@codeaurora.org>
Date: Tue, 11 Feb 2014 14:56:48 -0600
From: Kumar Gala <galak@...eaurora.org>
To: Andy Gross <agross@...eaurora.org>
Cc: Vinod Koul <vinod.koul@...el.com>,
Dan Williams <dan.j.williams@...el.com>,
dmaengine <dmaengine@...r.kernel.org>,
devicetree <devicetree@...r.kernel.org>,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-arm-msm <linux-arm-msm@...r.kernel.org>
Subject: Re: [Patch v5 2/2] dmaengine: qcom_bam_dma: Add device tree binding
On Feb 4, 2014, at 2:42 PM, Andy Gross <agross@...eaurora.org> wrote:
> Add device tree binding support for the QCOM BAM DMA driver.
>
> Signed-off-by: Andy Gross <agross@...eaurora.org>
> ---
> .../devicetree/bindings/dma/qcom_bam_dma.txt | 48 ++++++++++++++++++++
> 1 file changed, 48 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/dma/qcom_bam_dma.txt
Acked-by: Kumar Gala <galak@...eaurora.org>
- k
>
> diff --git a/Documentation/devicetree/bindings/dma/qcom_bam_dma.txt b/Documentation/devicetree/bindings/dma/qcom_bam_dma.txt
> new file mode 100644
> index 0000000..86344f1
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/dma/qcom_bam_dma.txt
> @@ -0,0 +1,48 @@
> +QCOM BAM DMA controller
> +
> +Required properties:
> +- compatible: Must be "qcom,bam-v1.4.0" for MSM8974 V1
> + Must be "qcom,bam-v1.4.1" for MSM8974 V2
> +- reg: Address range for DMA registers
> +- interrupts: single interrupt for this controller
> +- #dma-cells: must be <1>
> +- clocks: required clock
> +- clock-names: name of clock
> +- qcom,ee : indicates the active Execution Environment identifier (0-7)
> +
> +Example:
> +
> + uart-bam: dma@...84000 = {
> + compatible = "qcom,bam-v1.4.1";
> + reg = <0xf9984000 0x15000>;
> + interrupts = <0 94 0>;
> + clocks = <&gcc GCC_BAM_DMA_AHB_CLK>;
> + clock-names = "bam_clk";
> + #dma-cells = <1>;
> + qcom,ee = <0>;
> + };
> +
> +Client:
> +Required properties:
> +- dmas: List of dma channel requests
> +- dma-names: Names of aforementioned requested channels
> +
> +Clients must use the format described in the dma.txt file, using a two cell
> +specifier for each channel.
> +
> +The three cells in order are:
> + 1. A phandle pointing to the DMA controller
> + 2. The channel number
> +
> +Example:
> + serial@...1e000 {
> + compatible = "qcom,msm-uart";
> + reg = <0xf991e000 0x1000>
> + <0xf9944000 0x19000>;
> + interrupts = <0 108 0>;
> + clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>;
> + clock-names = "core", "iface";
> +
> + dmas = <&uart-bam 0>, <&uart-bam 1>;
> + dma-names = "rx", "tx";
> + };
> --
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> hosted by The Linux Foundation
>
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