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Message-ID: <20140211071403.GB18803@MrMyself>
Date: Tue, 11 Feb 2014 15:14:03 +0800
From: Nicolin Chen <Guangyu.Chen@...escale.com>
To: Xiubo Li <Li.Xiubo@...escale.com>
CC: <broonie@...nel.org>, <lgirdwood@...il.com>, <perex@...ex.cz>,
<tiwai@...e.de>, <alsa-devel@...a-project.org>,
<linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 2/2] ASoC: fsl-esai: big-endian support
On Tue, Feb 11, 2014 at 01:41:16PM +0800, Xiubo Li wrote:
> For most platforms, the CPU and ESAI device is in the same endianess
> mode. While for the LS1 platform, the CPU is in LE mode and the ESAI
> is in BE mode.
>
> Signed-off-by: Xiubo Li <Li.Xiubo@...escale.com>
> Cc: Nicolin Chen <Guangyu.Chen@...escale.com>
> ---
> Documentation/devicetree/bindings/sound/fsl,esai.txt | 6 ++++++
> sound/soc/fsl/fsl_esai.c | 7 ++++++-
> 2 files changed, 12 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/sound/fsl,esai.txt b/Documentation/devicetree/bindings/sound/fsl,esai.txt
> index d7b99fa..c395371 100644
> --- a/Documentation/devicetree/bindings/sound/fsl,esai.txt
> +++ b/Documentation/devicetree/bindings/sound/fsl,esai.txt
> @@ -34,6 +34,11 @@ Required properties:
> that ESAI would work in the synchronous mode, which means all the settings
> for Receiving would be duplicated from Transmition related registers.
>
> + - big-endian : If this property is absent, the native endian mode will
> + be in use as default, or the big endian mode will be in use for all the
> + device registers.
> +
> +
Single blank line should be enough here :)
> Example:
>
> esai: esai@...24000 {
> @@ -46,5 +51,6 @@ esai: esai@...24000 {
> dma-names = "rx", "tx";
> fsl,fifo-depth = <128>;
> fsl,esai-synchronous;
> + big-endian;
> status = "disabled";
> };
> diff --git a/sound/soc/fsl/fsl_esai.c b/sound/soc/fsl/fsl_esai.c
> index c84026c..e1f2669 100644
> --- a/sound/soc/fsl/fsl_esai.c
> +++ b/sound/soc/fsl/fsl_esai.c
> @@ -57,6 +57,7 @@ struct fsl_esai {
> bool sck_div[2];
> bool slave_mode;
> bool synchronous;
> + bool big_endian;
> char name[32];
> };
>
> @@ -661,7 +662,7 @@ static bool fsl_esai_writeable_reg(struct device *dev, unsigned int reg)
> }
> }
>
> -static const struct regmap_config fsl_esai_regmap_config = {
> +static struct regmap_config fsl_esai_regmap_config = {
> .reg_bits = 32,
> .reg_stride = 4,
> .val_bits = 32,
> @@ -687,6 +688,10 @@ static int fsl_esai_probe(struct platform_device *pdev)
> esai_priv->pdev = pdev;
> strcpy(esai_priv->name, np->name);
>
> + esai_priv->big_endian = of_property_read_bool(np, "big-endian");
> + if (esai_priv->big_endian)
> + fsl_esai_regmap_config.val_format_endian = REGMAP_ENDIAN_BIG;
> +
Same comments here. And please wait for Shawn's reply at the other patch
before you revise this part to V2.
Thanks.
> /* Get the addresses and IRQ */
> res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> regs = devm_ioremap_resource(&pdev->dev, res);
> --
> 1.8.4
>
>
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