linux-kernel - Re: [PATCH 00/21] perf, c2c: Add new tool to analyze cacheline contention on NUMA systems

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Message-ID: <CABPqkBSbBqOtvstKwQWD7jM8nn3XEdq0OXMjW8Z8oCF17uRYPw@mail.gmail.com>
Date:	Tue, 11 Feb 2014 12:08:56 +0100
From:	Stephane Eranian <eranian@...gle.com>
To:	Peter Zijlstra <peterz@...radead.org>
Cc:	Don Zickus <dzickus@...hat.com>,
	Arnaldo Carvalho de Melo <acme@...stprotocols.net>,
	LKML <linux-kernel@...r.kernel.org>,
	Jiri Olsa <jolsa@...hat.com>, Joe Mario <jmario@...hat.com>,
	Richard Fowles <fowles@...each.com>
Subject: Re: [PATCH 00/21] perf, c2c: Add new tool to analyze cacheline
 contention on NUMA systems

On Tue, Feb 11, 2014 at 12:04 PM, Stephane Eranian <eranian@...gle.com> wrote:
> On Tue, Feb 11, 2014 at 12:02 PM, Peter Zijlstra <peterz@...radead.org> wrote:
>> On Tue, Feb 11, 2014 at 11:58:45AM +0100, Stephane Eranian wrote:
>>> On Tue, Feb 11, 2014 at 11:52 AM, Peter Zijlstra <peterz@...radead.org> wrote:
>>> > On Tue, Feb 11, 2014 at 11:35:45AM +0100, Stephane Eranian wrote:
>>> >> On Tue, Feb 11, 2014 at 8:14 AM, Peter Zijlstra <peterz@...radead.org> wrote:
>>> >> >
>>> >> > That blows; how much is missing?
>>> >>
>>> >> They need to annotate load and stores. I asked for that feature a while ago.
>>> >> It will come.
>>> >
>>> > And there is no way to deduce the information? We have type information
>>> > for all arguments and local variables, right? So we can follow that.
>>> >
>>> > struct foo {
>>> >         int ponies;
>>> >         int moar_ponies;
>>> > };
>>> >
>>> > struct bar {
>>> >         int my_ponies;
>>> >         struct foo *foo;
>>> > };
>>> >
>>> > int moo(struct bar *bar)
>>> > {
>>> >         return bar->foo->moar_ponies;
>>> > }
>>> >
>>> > Since we have the argument type, we can find the type for both loads,
>>> > the first load:
>>> >
>>> >   *bar+8, we know is: struct foo * bar::foo
>>> >   *foo+4, we know is: int foo::moar_ponies
>>> >
>>> > Or am I missing something?
>>>
>>> How do you know that load at addr 0x1000 is accessing variable bar?
>>> The IP gives you line number, and then what?
>>> I think dwarf has the mapping regs -> variable and yes, the type info.
>>> But I am not sure that's enough.
>>
>> Ah, but if you have the instruction, you can decode it and obtain the
>> reg and thus type-info, no?
>>
> But on x86, you can load directly from memory, you'd only have the
> target reg for the load. Not enough.

Assuming you can decode and get the info about the base registers used,
you'd have to do this for each arch with load/store sampling capabilities.
this is painful compared to getting the portable info from dwarf directly.
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