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Message-ID: <CABPqkBRw4W9=ORuhAJpx4L0pCt8iBKshhR5Qv5cLvcD5vR2eRA@mail.gmail.com>
Date: Tue, 11 Feb 2014 12:28:47 +0100
From: Stephane Eranian <eranian@...gle.com>
To: Peter Zijlstra <peterz@...radead.org>
Cc: Don Zickus <dzickus@...hat.com>,
Arnaldo Carvalho de Melo <acme@...stprotocols.net>,
LKML <linux-kernel@...r.kernel.org>,
Jiri Olsa <jolsa@...hat.com>, Joe Mario <jmario@...hat.com>,
Richard Fowles <fowles@...each.com>
Subject: Re: [PATCH 00/21] perf, c2c: Add new tool to analyze cacheline
contention on NUMA systems
On Tue, Feb 11, 2014 at 12:14 PM, Peter Zijlstra <peterz@...radead.org> wrote:
> On Tue, Feb 11, 2014 at 12:08:56PM +0100, Stephane Eranian wrote:
>> Assuming you can decode and get the info about the base registers used,
>> you'd have to do this for each arch with load/store sampling capabilities.
>> this is painful compared to getting the portable info from dwarf directly.
>
> But its useful now, as compared to whenever GCC gets around to
> implementing more dwarves and that GCC getting used widely enough to
> actually rely on it.
>
> All you need for the decode is a disassembler, and every arch should
> already have multiple of those. Should be easy to reuse one, right?
I know, and you want to pull this into the perf tool?
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