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Message-Id: <1392220776-30851-8-git-send-email-sebastian.hesselbarth@gmail.com>
Date: Wed, 12 Feb 2014 16:59:30 +0100
From: Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>
To: Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>
Cc: Linus Walleij <linus.walleij@...aro.org>,
Jason Cooper <jason@...edaemon.net>,
Andrew Lunn <andrew@...n.ch>,
Gregory Clement <gregory.clement@...e-electrons.com>,
Thomas Petazzoni <thomas.petazzoni@...e-electrons.com>,
Ezequiel Garcia <ezequiel.garcia@...e-electrons.com>,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: [PATCH v3 07/13] pinctrl: mvebu: kirkwood: provide generic mpp callbacks
We want to get rid of passing register addresses to common pinctrl
driver, so provide set/get callbacks for generic mpp pins that will
be used later.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>
Tested-by: Andrew Lunn <andrew@...n.ch>
---
Cc: Linus Walleij <linus.walleij@...aro.org>
Cc: Jason Cooper <jason@...edaemon.net>
Cc: Andrew Lunn <andrew@...n.ch>
Cc: Gregory Clement <gregory.clement@...e-electrons.com>
Cc: Thomas Petazzoni <thomas.petazzoni@...e-electrons.com>
Cc: Ezequiel Garcia <ezequiel.garcia@...e-electrons.com>
Cc: linux-arm-kernel@...ts.infradead.org
Cc: linux-kernel@...r.kernel.org
---
drivers/pinctrl/mvebu/pinctrl-kirkwood.c | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/drivers/pinctrl/mvebu/pinctrl-kirkwood.c b/drivers/pinctrl/mvebu/pinctrl-kirkwood.c
index 6b504b5935a5..be8b2c9e2585 100644
--- a/drivers/pinctrl/mvebu/pinctrl-kirkwood.c
+++ b/drivers/pinctrl/mvebu/pinctrl-kirkwood.c
@@ -21,6 +21,30 @@
#include "pinctrl-mvebu.h"
+static void __iomem *mpp_base;
+
+static int kirkwood_mpp_ctrl_get(unsigned pid, unsigned long *config)
+{
+ unsigned off = (pid / MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS;
+ unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS;
+
+ *config = (readl(mpp_base + off) >> shift) & MVEBU_MPP_MASK;
+
+ return 0;
+}
+
+static int kirkwood_mpp_ctrl_set(unsigned pid, unsigned long config)
+{
+ unsigned off = (pid / MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS;
+ unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS;
+ unsigned long reg;
+
+ reg = readl(mpp_base + off) & ~(MVEBU_MPP_MASK << shift);
+ writel(reg | (config << shift), mpp_base + off);
+
+ return 0;
+}
+
#define V(f6180, f6190, f6192, f6281, f6282, dx4122) \
((f6180 << 0) | (f6190 << 1) | (f6192 << 2) | \
(f6281 << 3) | (f6282 << 4) | (dx4122 << 5))
--
1.8.5.3
--
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