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Message-ID: <20140214203053.GO4451@sirena.org.uk>
Date: Fri, 14 Feb 2014 20:30:53 +0000
From: Mark Brown <broonie@...nel.org>
To: Philipp Zabel <p.zabel@...gutronix.de>
Cc: linux-kernel@...r.kernel.org, Liam Girdwood <lgirdwood@...il.com>,
Shawn Guo <shawn.guo@...aro.org>,
Anson Huang <b20788@...escale.com>, kernel@...gutronix.de
Subject: Re: [PATCH v3 1/2] regulator: anatop: Add power gating support to
digital LDOs
On Tue, Feb 11, 2014 at 02:43:44PM +0100, Philipp Zabel wrote:
> The ARM, PU, and SOC LDOs in the i.MX6 PMU can completely gate
> their power output. Since power gating is configured by writing
> zero to the voltage target bitfield,, store a copy of the
> voltage selector to be restored when reenabling the regulator.
Applied both, thanks.
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