lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20140228061254.GA2226@srcf.ucam.org>
Date:	Fri, 28 Feb 2014 06:12:54 +0000
From:	Matthew Garrett <mjg59@...f.ucam.org>
To:	"Li, Aubrey" <aubrey.li@...ux.intel.com>
Cc:	"alan@...ux.intel.com" <alan@...ux.intel.com>,
	linux-kernel@...r.kernel.org,
	"H. Peter Anvin" <hpa@...ux.intel.com>, Len.Brown@...el.com,
	Adam Williamson <awilliam@...hat.com>
Subject: Re: [patch] x86: Introduce BOOT_EFI and BOOT_CF9 into the reboot
 sequence loop

On Fri, Feb 28, 2014 at 02:07:58PM +0800, Li, Aubrey wrote:
> On 2014/2/28 13:56, Matthew Garrett wrote:
> > Probably, once we've got those patches landed (I've lost track of 
> > whether they're in 3.13 or aimed at 3.14)
> 
> You didn't look the reference I quoted in the patch.
> 
> It's stable if 32/64 bit linux call the corresponding 32/64bit EFI
> runtime service. Matt Fleming's mixed mode is aiming at 3.15:
> 
> http://git.kernel.org/cgit/linux/kernel/git/mfleming/efi.git/log/?h=mixed-mode

It's stable as long as you have the 1:1 mapping patches, which are 
different to the mixed mode patches. Otherwise it'll work on some 
hardware and crash on others.

> > Mm. Not all x86 platforms support cf8/cf9 (Moorestown, for instance) and 
> > so it's theoretically possible that they'd put some different hardware 
> > there instead. But then, Moorestown probably has its own reboot code, so 
> > that may not matter?
> 
> Yes, Moorestown has its own machine_ops. Instead of the system hanging
> after issue "reboot" command, I think and suggest CF9 is worth to have a
> try.

Writing to arbitrary register addresses isn't a good plan if we're on a 
platform that might have different hardware there.

> >> Reset register address: 0xCF9
> >> Value to cause reset:   0x6
> > 
> > Huh. But that's almost exactly what the PCI reboot code would do. Why 
> > does the PCI method work but the ACPI one fail? Does it really depend on 
> > ORing the original value with the reset value? Or is the timing just 
> > somehow marginal?
> 
> reboot returns at:
> 
> if (!(acpi_gbl_FADT.flags & ACPI_FADT_RESET_REGISTER))
>                 return;
> 
> This is a ACPI bug or intention, who knows.

Well, how about we figure that out? Is there a full acpi dump of one of 
these machines somewhere?

-- 
Matthew Garrett | mjg59@...f.ucam.org
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ