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Message-ID: <20140305223544.GA2813@8bytes.org>
Date: Wed, 5 Mar 2014 23:35:45 +0100
From: Joerg Roedel <joro@...tes.org>
To: suravee.suthikulpanit@....com
Cc: iommu@...ts.linux-foundation.org, linux-kernel@...r.kernel.org,
kim.naru@....com, jay.cornwall@....com
Subject: Re: [PATCH] iommu/amd: Fix logics to determine and checking max PASID
On Wed, Mar 05, 2014 at 01:01:08PM -0600, suravee.suthikulpanit@....com wrote:
> drivers/iommu/amd_iommu.c | 26 +++++++++++++++++++++++---
> drivers/iommu/amd_iommu_init.c | 15 ++++++++-------
> drivers/iommu/amd_iommu_types.h | 6 ++----
> drivers/iommu/amd_iommu_v2.c | 2 +-
> 4 files changed, 34 insertions(+), 15 deletions(-)
Hmm, this looks a bit complicated. Since the inv_iotlb_pasid and
complete_ppr command only support 16 bit pasids by specification, there
is no way to support pasids with more than 16 bits in general anymore. I
think the best way to handle it is to just change the PASID_MASK to
0x0000ffff.
> static void build_inv_iotlb_pasid(struct iommu_cmd *cmd, u16 devid, int pasid,
> int qdep, u64 address, bool size)
> {
> + /* Note:
> + * This command supports only 16-bit PASID.
> + * Currently, hardware only implement upto 16-bit PASID
> + * even though the spec says it could have upto 20 bits.
> + * This is likely to be updated in the future revision of
> + * IOMMU specs when the hardware with PASID > 16 bits
> + * become available.
> + */
> + BUG_ON(pasid > 0xFFFF);
We can keep this as BUG_ON(pasid & ~PASID_MASK), but then ...
> - cmd->data[1] = pasid & PASID_MASK;
> + cmd->data[1] = pasid & amd_iommu_max_pasid;
... masking out the other bits is redundant.
Joerg
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