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Message-ID: <CA+55aFw_1Cw1hWVLB7HG_2SKW=7NXH8=DR3a96q4fqOhoOcdpQ@mail.gmail.com>
Date:	Tue, 11 Mar 2014 10:43:11 -0700
From:	Linus Torvalds <torvalds@...ux-foundation.org>
To:	Ingo Molnar <mingo@...nel.org>,
	One Thousand Gnomes <gnomes@...rguk.ukuu.org.uk>
Cc:	"H. Peter Anvin" <hpa@...ux.intel.com>,
	Stefani Seibold <stefani@...bold.net>,
	Andy Lutomirski <luto@...capital.net>,
	Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
	Andreas Brief <Andreas.Brief@...de-schwarz.com>,
	Martin Runge <Martin.Runge@...de-schwarz.com>
Subject: On trying to drop X86_PPRO_FENCE..

On Tue, Mar 11, 2014 at 3:11 AM, Ingo Molnar <mingo@...nel.org> wrote:
>
> But ... when PPro was common our parallelization sucked, so I'd not be
> surprised if it triggered more frequently with a modern kernel.

Agreed. It is certainly very possible that we had no reports of this
simply because we never had any real concurrent cache accesses
(outside of the BKL).

That said, the Intel errata does do say that they never saw reports of
it in any real loads either, so it really is debatable whether it ever
made sense. Back in the PPro days, there were *other* x86 unixes
around that might have hit it, including very much the Sequent NUMA-Q.

I have this dim memory that the only reason I knew about the errata
originally was that I was talking memory ordering for the spinlock
code with Andy Glew from Intel, to verify that a simple store really
does work as an unlock, and he dropped the "Yeah, except for some
buggy old PPro cpu errata" bomb.

(Although honestly, that whole thing is so long ago that my "dim
memory" is very suspect, and it's possible the workaround actually
came independently of that from Alan Cox. This all happened in
v2.4.13-rc2 - late 2001 - and the PPro workaround came in together
with the X86 OOSTORE code, which I *think* was Alan. Asking the gnomes
in case they remember how it happened).

                 Linus
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