linux-kernel - Re: [PATCH 1/3] perf tests: Introduce perf_regs

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Message-ID: <CAFrcx1mCTLzc1dcSZyk_GOENsD-QGbyU+4NHa3BZFLYxyk7n_Q@mail.gmail.com>
Date:	Tue, 11 Mar 2014 19:25:11 +0100
From:	Jean Pihet <jean.pihet@...aro.org>
To:	Will Deacon <will.deacon@....com>,
	"steve.capper@...aro.org" <steve.capper@...aro.org>
Cc:	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linaro-kernel@...ts.linaro.org" <linaro-kernel@...ts.linaro.org>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	Arnaldo <acme@...stprotocols.net>,
	Ingo Molnar <mingo@...nel.org>,
	"patches@...aro.org" <patches@...aro.org>,
	Corey Ashford <cjashfor@...ux.vnet.ibm.com>,
	Frederic Weisbecker <fweisbec@...il.com>,
	Namhyung Kim <namhyung@...nel.org>,
	Paul Mackerras <paulus@...ba.org>,
	Peter Zijlstra <a.p.zijlstra@...llo.nl>,
	David Ahern <dsahern@...il.com>, Jiri Olsa <jolsa@...hat.com>
Subject: Re: [PATCH 1/3] perf tests: Introduce perf_regs_load function on ARM

HI Will, Steve,

On 6 March 2014 18:22, Jiri Olsa <jolsa@...hat.com> wrote:
> On Thu, Mar 06, 2014 at 11:33:15AM +0000, Will Deacon wrote:
>> On Wed, Mar 05, 2014 at 02:17:00AM +0000, Jean Pihet wrote:
>> > On 4 March 2014 12:00, Will Deacon <will.deacon@....com> wrote:
>> > > On Mon, Mar 03, 2014 at 09:53:21AM +0000, Jean Pihet wrote:
>> > >> +     str lr, [r0, #PC]       @ Save caller PC
>> > >
>> > > This isn't necessarily the `caller PC' (depending on how you define it).
>> > > It's the return address, which is probably (but not always) the instruction
>> > > following the branch to this function.
>> > Agreed. However the perf test code expects a registers buffer filled
>> > in with the caller's values.
>> > I can change the comment here, is that needed?
>>
>> It depends what the perf test code really expects. At the moment, you're not
>> providing it with anything consistent which doesn't sound correct.
>
> the code expects caller's PC. That is what the x86 test code
> expects from perf_regs_load. We take the return IP saved by
> call instruction:
>
> ENTRY(perf_regs_load)
>         ...
>         movq 0(%rsp), %rax
>         movq %rax, IP(%rdi)
>         ...
>
> jirka

The perf built-in test code expects the caller PC to do the unwinding
from. Does that sound correct to you?

Do you want me to add a note like this one (as done in the upcoming
aarch64 patches, to be submitted asap after testing):
"
/*
 * Implementation of void perf_regs_load(u64 *regs);
 *
 * This functions fills in the 'regs' buffer from the actual registers values.
 *
 * Notes:
 *  1. the return value of the pc is retrieved from lr and stored, in order
 *  to skip the call to this function,
 *  2. the current value of lr is merely retrieved and stored because the
 *  value before the call to this function is unknown at this time; it will
 *  be unwound from the dwarf information in unwind__get_entries.
 */
"

Please let me know how to make this better.

Regards,
Jean
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