linux-kernel - [PATCH 05/17] clocksource: keystone: add bindings for keystone timer

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Message-Id: <1394577653-8615-5-git-send-email-daniel.lezcano@linaro.org>
Date:	Tue, 11 Mar 2014 23:40:41 +0100
From:	Daniel Lezcano <daniel.lezcano@...aro.org>
To:	tglx@...utronix.de, mingo@...nel.org
Cc:	linux-kernel@...r.kernel.org, dan.carpenter@...cle.com,
	ezequiel.garcia@...e-electrons.com, ivan.khoronzhuk@...com,
	linus.walleij@...aro.org, magnus.damm@...il.com,
	matthias.bgg@...il.com, soren.brinkmann@...inx.com,
	sboyd@...eaurora.org
Subject: [PATCH 05/17] clocksource: keystone: add bindings for keystone timer

From: Ivan Khoronzhuk <ivan.khoronzhuk@...com>

This patch provides bindings for the 64-bit timer in the KeyStone
architecture devices. The timer can be configured as a general-purpose 64-bit
timer, dual general-purpose 32-bit timers. When configured as dual 32-bit
timers, each half can operate in conjunction (chain mode) or independently
(unchained mode) of each other.

It is global timer is a free running up-counter and can generate interrupt
when the counter reaches preset counter values.

Documentation:
http://www.ti.com/lit/ug/sprugv5a/sprugv5a.pdf

Acked-by: Rob Herring <robh@...nel.org>
Acked-by: Santosh Shilimkar <santosh.shilimkar@...com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@...com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@...aro.org>
---
 .../bindings/timer/ti,keystone-timer.txt           |   29 ++++++++++++++++++++
 1 file changed, 29 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/timer/ti,keystone-timer.txt

diff --git a/Documentation/devicetree/bindings/timer/ti,keystone-timer.txt b/Documentation/devicetree/bindings/timer/ti,keystone-timer.txt
new file mode 100644
index 0000000..5fbe361
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/ti,keystone-timer.txt
@@ -0,0 +1,29 @@
+* Device tree bindings for Texas instruments Keystone timer
+
+This document provides bindings for the 64-bit timer in the KeyStone
+architecture devices. The timer can be configured as a general-purpose 64-bit
+timer, dual general-purpose 32-bit timers. When configured as dual 32-bit
+timers, each half can operate in conjunction (chain mode) or independently
+(unchained mode) of each other.
+
+It is global timer is a free running up-counter and can generate interrupt
+when the counter reaches preset counter values.
+
+Documentation:
+http://www.ti.com/lit/ug/sprugv5a/sprugv5a.pdf
+
+Required properties:
+
+- compatible : should be "ti,keystone-timer".
+- reg : specifies base physical address and count of the registers.
+- interrupts : interrupt generated by the timer.
+- clocks : the clock feeding the timer clock.
+
+Example:
+
+timer@...0000 {
+	compatible = "ti,keystone-timer";
+	reg = <0x022f0000 0x80>;
+	interrupts = <GIC_SPI 110 IRQ_TYPE_EDGE_RISING>;
+	clocks = <&clktimer15>;
+};
-- 
1.7.9.5

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