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Message-ID: <20140312003401.GE28112@sirena.org.uk>
Date: Wed, 12 Mar 2014 00:34:01 +0000
From: Mark Brown <broonie@...nel.org>
To: Max Filippov <jcmvbkbc@...il.com>
Cc: "linux-xtensa@...ux-xtensa.org" <linux-xtensa@...ux-xtensa.org>,
linux-spi@...r.kernel.org, LKML <linux-kernel@...r.kernel.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
Chris Zankel <chris@...kel.net>,
Marc Gauthier <marc@...ence.com>,
Rob Herring <robh+dt@...nel.org>,
Grant Likely <grant.likely@...aro.org>,
Andrew Morton <akpm@...ux-foundation.org>
Subject: Re: [PATCH 1/3] spi: add xtfpga SPI controller driver
On Wed, Mar 12, 2014 at 12:20:49AM +0400, Max Filippov wrote:
> On Tue, Mar 11, 2014 at 11:49 PM, Mark Brown <broonie@...nel.org> wrote:
> > On Tue, Mar 11, 2014 at 04:44:49PM +0400, Max Filippov wrote:
> >> + unsigned long timeout = jiffies + msecs_to_jiffies(100);
> >> + while (xtfpga_spi_read32(xspi, XTFPGA_SPI_BUSY)) {
> >> + if (!time_before(jiffies, timeout))
> >> + return -EBUSY;
> >> + else
> >> + cpu_relax();
> >> + }
> > So we'll busy wait for up to 100ms - that seems like an awfully long
> > time. Perhaps fall back to msleep() if the delay is non-trivial (or
> > just reduce the timeout)?
> The timeout is here for the unlikely case everything went wrong. Normally
> transfers get completed in about 10 useconds on 50 MHz hardware, it
> doesn't seem worth msleeping here. I put the timeout here just because
> otherwise infinite loop polling the device register looks scary.
I appreciate that but even with 5MHz that's three orders of magnitude
longer busy waiting in the error case than the operation is expected to
take. If you must wait for that long busy wait for a bit then start
sleeping.
>
> >> +/* Unused: this device controls its only CS automatically,
> >> + * deactivating it after every 16 bit transfer completion.
> >> + */
> > This is too limited to use with most SPI clients, they'll want to be
> > able to transmit more than one word (and the fact that only 16 bit words
> > are supported is also an issue, though that's easy enough to handle for
> > a bitbanging driver - I'd really strongly suggest supporting 8 bits per
> > word as well). Clients are pretty much going to need to use GPIO based
> > chip select, you should make sure that's supported and covered in the
> > binding.
> There's no hardware for that. This device is really dumb, it is specifically
> suited to control TLV320AIC23 which expects exactly 16 bit words, SPI
> mode 0.
This driver is not actually compatible with the tlv320aic23 driver since
it needs 8 bit words, you need to at least support that. You don't need
hardware in the controller to support a GPIO chip select, the whole
point is that the controller chip select isn't wired up and a GPIO is
used instead.
> >> +static void xtfpga_spi_chipselect(struct spi_device *spi, int is_on)
> >> +{
> >> +}
> > Omit this since it's empty.
> The bitbang side doesn't like when this callback is NULL and returns
> -EINVAL from spi_bitbang_start.
So fix that, but really it's trying to tell you that the hardware is far
too limited to work with many things.
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