linux-kernel - Re: [PATCH v2 7/7] ARM: zynq: DT: Migrate UART to Cadence binding

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Message-ID: <44c9eddf-9f61-4219-8564-a3019dc0fd87@AM1EHSMHS021.ehs.local>
Date:	Wed, 12 Mar 2014 07:01:38 +0100
From:	Michal Simek <michal.simek@...inx.com>
To:	Sören Brinkmann <soren.brinkmann@...inx.com>
CC:	Michal Simek <michal.simek@...inx.com>,
	Russell King <linux@....linux.org.uk>,
	Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
	Jiri Slaby <jslaby@...e.cz>,
	One Thousand Gnomes <gnomes@...rguk.ukuu.org.uk>,
	Peter Crosthwaite <peter.crosthwaite@...inx.com>,
	<linux-kernel@...r.kernel.org>,
	<linux-arm-kernel@...ts.infradead.org>,
	<linux-serial@...r.kernel.org>, Rob Herring <robh+dt@...nel.org>,
	Pawel Moll <pawel.moll@....com>,
	Mark Rutland <mark.rutland@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Kumar Gala <galak@...eaurora.org>,
	Rob Landley <rob@...dley.net>,
	Grant Likely <grant.likely@...aro.org>,
	<devicetree@...r.kernel.org>, <linux-doc@...r.kernel.org>
Subject: Re: [PATCH v2 7/7] ARM: zynq: DT: Migrate UART to Cadence binding

On 03/11/2014 04:48 PM, Sören Brinkmann wrote:
> On Tue, 2014-03-11 at 09:52AM +0100, Michal Simek wrote:
>> On 03/10/2014 10:40 PM, Soren Brinkmann wrote:
>>> The Zynq UART is Cadence IP and the driver has been renamed accordingly.
>>> Migrate the DT to use the new binding for the UART driver.
>>>
>>> Signed-off-by: Soren Brinkmann <soren.brinkmann@...inx.com>
>>> Acked-by: Peter Crosthwaite <peter.crosthwaite@...inx.com>
>>> Acked-by: Rob Herring <robh@...nel.org>
>>> ---
>>> This change depends on 'tty: xuartps: Rebrand driver as Cadence UART',
>>> which introduces the new clock-names.
>>> ---
>>>  arch/arm/boot/dts/zynq-7000.dtsi | 8 ++++----
>>>  1 file changed, 4 insertions(+), 4 deletions(-)
>>>
>>> diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi
>>> index 8b67b19392ec..0ed0d4b0579a 100644
>>> --- a/arch/arm/boot/dts/zynq-7000.dtsi
>>> +++ b/arch/arm/boot/dts/zynq-7000.dtsi
>>> @@ -67,19 +67,19 @@
>>>  		};
>>>  
>>>  		uart0: uart@...00000 {
>>> -			compatible = "xlnx,xuartps";
>>> +			compatible = "xlnx,xuartps", "cdns,uart-r1p8";
>>>  			status = "disabled";
>>>  			clocks = <&clkc 23>, <&clkc 40>;
>>> -			clock-names = "ref_clk", "aper_clk";
>>> +			clock-names = "uart_clk", "pclk";
>>>  			reg = <0xE0000000 0x1000>;
>>>  			interrupts = <0 27 4>;
>>>  		};
>>>  
>>>  		uart1: uart@...01000 {
>>> -			compatible = "xlnx,xuartps";
>>> +			compatible = "xlnx,xuartps", "cdns,uart-r1p8";
>>>  			status = "disabled";
>>>  			clocks = <&clkc 24>, <&clkc 41>;
>>> -			clock-names = "ref_clk", "aper_clk";
>>> +			clock-names = "uart_clk", "pclk";
>>>  			reg = <0xE0001000 0x1000>;
>>>  			interrupts = <0 50 4>;
>>>  		};
>>
>> This should be at least the part of 5/7 because between 5/7 and 7/7
>> driver will fail to probe.
> 
> The driver should never fail to probe. The old bindings will continue to
> work. So, only dependency for this is, the new clock names must be
> merged in. So, it has to be rather late in the series.

We discussed this over phone and yes, I have missed that.

Thanks,
Michal


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