linux-kernel - Re: [PATCH 1/3] spi: add xtfpga SPI controller driver

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Message-ID: <20140312010858.GI28112@sirena.org.uk>
Date:	Wed, 12 Mar 2014 01:08:58 +0000
From:	Mark Brown <broonie@...nel.org>
To:	Max Filippov <jcmvbkbc@...il.com>
Cc:	"linux-xtensa@...ux-xtensa.org" <linux-xtensa@...ux-xtensa.org>,
	linux-spi@...r.kernel.org, LKML <linux-kernel@...r.kernel.org>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	Chris Zankel <chris@...kel.net>,
	Marc Gauthier <marc@...ence.com>,
	Rob Herring <robh+dt@...nel.org>,
	Grant Likely <grant.likely@...aro.org>,
	Andrew Morton <akpm@...ux-foundation.org>
Subject: Re: [PATCH 1/3] spi: add xtfpga SPI controller driver

On Wed, Mar 12, 2014 at 04:59:47AM +0400, Max Filippov wrote:
> On Wed, Mar 12, 2014 at 4:34 AM, Mark Brown <broonie@...nel.org> wrote:

> > This driver is not actually compatible with the tlv320aic23 driver since
> > it needs 8 bit words, you need to at least support that.  You don't need

> That's strange, because the codec datasheet says the following (section
> 3.1.1):

> A control word consists of 16 bits, starting with the MSB. The data bits are
> latched on the rising edge of SCLK. A rising edge on CS after the 16th rising
> clock edge latches the data word into the AIC (see Figure 3-1).

> And tlv320aic23 has the following regmap:

> const struct regmap_config tlv320aic23_regmap = {
>         .reg_bits = 7,
>         .val_bits = 9,

Yes, and regmap will format that itself for transmission in 8 bit words
so you don't want the SPI controller to also do byte swapping.

> and its SPI interface accordingly does the following in .probe:

>         spi->bits_per_word = 16
>         spi->mode = SPI_MODE_0;
>         ret = spi_setup(spi);

That's buggy, drivers should never configure anything more than 8 bits
per word with regmap.

> > hardware in the controller to support a GPIO chip select, the whole
> > point is that the controller chip select isn't wired up and a GPIO is
> > used instead.

> Actually it's not GPIO. The controller asserts CS line once we set the
> start bit while the busy bit is cleared and deasserts it after 16 SCK
> pulses.

You're missing the point.  The controller chip select line can do what
it likes, it's not connected to the target device if a GPIO is being
used.

> > So fix that, but really it's trying to tell you that the hardware is far
> > too limited to work with many things.

> Ok. It's not designed to work with many things. Should I just move this
> driver to the rest of the platform code under arch/xtensa/platform/xtfpga?

No, not if you intend to use generic drivers with it.

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