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Message-ID: <20140313104303.GB4418@piout.net>
Date: Thu, 13 Mar 2014 11:43:03 +0100
From: Alexandre Belloni <alexandre.belloni@...e-electrons.com>
To: Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>
Cc: Antoine Ténart
<antoine.tenart@...e-electrons.com>, zmxu@...vell.com,
jszhang@...vell.com, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/2] ARM: dts: berlin2q: add the Marvell Armada 1500 pro
(BG2Q) device tree
On 13/03/2014 at 10:05:31 +0000, Sebastian Hesselbarth wrote :
> On 03/12/2014 11:06 AM, Antoine Ténart wrote:
> >+ compatible = "arm,cortex-a9-twd-timer";
> >+ reg = <0xad0600 0x20>;
> >+ clocks = <&sysclk>;
>
> Playing with Chromecast, I remember local-timer running at sysclk/3 or
> something. I know berlin2/berlin2cd is wrong here. Can you check that
> for berlin2q local-timer also runs at sysclk/n?
>
Actually, what we have is sysclk = cpuclk/3 so I guess it depends on
what you call sysclk.
> >+ interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
> >+ status = "okay";
> >+ };
> >+
> >+ apb@...000 {
> >+ compatible = "simple-bus";
> >+ #address-cells = <1>;
> >+ #size-cells = <1>;
> >+
> >+ ranges = <0 0xe80000 0x10000>;
> >+ interrupt-parent = <&aic>;
> >+
> >+ timer0: timer@...0 {
> >+ compatible = "snps,dw-apb-timer";
> >+ reg = <0x2c00 0x14>;
> >+ interrupts = <8>;
> >+ clock-freq = <100000000>;
> >+ status = "okay";
> >+ };
> >+
> >+ timer1: timer@...4 {
> >+ compatible = "snps,dw-apb-timer";
> >+ reg = <0x2c14 0x14>;
> >+ clock-freq = <100000000>;
> >+ status = "disabled";
> >+ };
>
> berlin2/berlin2cd have a vast amount of 8 apb timers. Any timers missing
> here or did Marvell remove them?
>
>
> Also for uart, can you please double-check if there is no uart2?
>
We don't have those informations, maybe Jisheng can help ?
--
Alexandre Belloni, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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