linux-kernel - Re: [PATCH v4 2/5] ARM: dts: am43xx clock data

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Message-ID: <5321EAA2.8080807@ti.com>
Date:	Thu, 13 Mar 2014 19:28:02 +0200
From:	Roger Quadros <rogerq@...com>
To:	George Cherian <george.cherian@...com>,
	<linux-kernel@...r.kernel.org>, <linux-doc@...r.kernel.org>,
	<devicetree@...r.kernel.org>, <linux-omap@...r.kernel.org>
CC:	<balbi@...com>, <kishon@...com>, <rob@...dley.net>,
	<galak@...eaurora.org>, <ijc+devicetree@...lion.org.uk>,
	<mark.rutland@....com>, <pawel.moll@....com>, <robh+dt@...nel.org>,
	<tony@...mide.com>, <anatol.pomozov@...il.com>,
	<bcousson@...libre.com>
Subject: Re: [PATCH v4 2/5] ARM: dts: am43xx clock data

On 03/13/2014 05:11 PM, George Cherian wrote:
> Add USB and USB PHY reference clock data
> 
> Signed-off-by: George Cherian <george.cherian@...com>
> ---
>  arch/arm/boot/dts/am43xx-clocks.dtsi | 32 ++++++++++++++++++++++++++++++++
>  1 file changed, 32 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/am43xx-clocks.dtsi b/arch/arm/boot/dts/am43xx-clocks.dtsi
> index 142009c..c74d45c 100644
> --- a/arch/arm/boot/dts/am43xx-clocks.dtsi
> +++ b/arch/arm/boot/dts/am43xx-clocks.dtsi
> @@ -653,4 +653,36 @@
>  		clocks = <&clk_32768_ck>, <&clk_32k_tpm_ck>;
>  		reg = <0x4260>;
>  	};
> +
> +	usb_phy0_always_on_clk32k: usb_phy0_always_on_clk32k {
> +		#clock-cells = <0>;
> +		compatible = "fixed-factor-clock";
> +		clocks = <&clk_32768_ck>;
> +		clock-mult = <1>;
> +		clock-div = <1>;
> +	};
> +
> +	usb_phy1_always_on_clk32k: usb_phy1_always_on_clk32k {
> +		#clock-cells = <0>;
> +		compatible = "fixed-factor-clock";
> +		clocks = <&clk_32768_ck>;
> +		clock-mult = <1>;
> +		clock-div = <1>;
> +	};

Shouldn't these be like so?

usb_phy0_always_on_clk32k: usb_phy0_always_on_clk32k {
        #clock-cells = <0>;
        compatible = "ti,gate-clock";
        clocks = <&usbphy_32khz_clkmux>;
        ti,bit-shift = <8>;
        reg = <0x2a40>;
};

usb_phy1_always_on_clk32k: usb_phy1_always_on_clk32k {
        #clock-cells = <0>;
        compatible = "ti,gate-clock";
        clocks = <&usbphy_32khz_clkmux>;
        ti,bit-shift = <8>;
        reg = <0x2a48>;
};

> +
> +	usb_otg_ss0_refclk960m: usb_otg_ss0_refclk960m {
> +		#clock-cells = <0>;
> +	        compatible = "ti,gate-clock";
> +		clocks = <&dpll_per_clkdcoldo>;
> +	        ti,bit-shift = <8>;
> +	        reg = <0x8a60>;
> +	};
> +
> +	usb_otg_ss1_refclk960m: usb_otg_ss1_refclk960m {
> +		#clock-cells = <0>;
> +	        compatible = "ti,gate-clock";
> +		clocks = <&dpll_per_clkdcoldo>;
> +	        ti,bit-shift = <8>;
> +		reg = <0x8a68>;
> +	};
>  };
> 

cheers,
-roger
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