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Message-Id: <1394745733-27855-2-git-send-email-andi@firstfloor.org>
Date:	Thu, 13 Mar 2014 14:22:13 -0700
From:	Andi Kleen <andi@...stfloor.org>
To:	mingo@...nel.org
Cc:	linux-kernel@...r.kernel.org, peterz@...radead.org,
	eranian@...gle.com, acme@...hat.com, namhyung@...nel.org,
	jolsa@...hat.com, Andi Kleen <ak@...ux.intel.com>
Subject: [PATCH 2/2] perf, x86: Don't mark DataLA addresses as store

From: Andi Kleen <ak@...ux.intel.com>

Haswell supports reporting the data address for a range
of events, including UOPS_RETIRED.ALL and some load
events. Currently these addresses were always marked
as stores, which is wrong, as they could be loads too.
Change it to NA instead.

Signed-off-by: Andi Kleen <ak@...ux.intel.com>
---
 arch/x86/kernel/cpu/perf_event_intel_ds.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/kernel/cpu/perf_event_intel_ds.c b/arch/x86/kernel/cpu/perf_event_intel_ds.c
index 77bdb09..7a319cf 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_ds.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_ds.c
@@ -113,7 +113,7 @@ static u64 precise_store_data_hsw(u64 status)
 	union perf_mem_data_src dse;
 
 	dse.val = 0;
-	dse.mem_op = PERF_MEM_OP_STORE;
+	dse.mem_op = PERF_MEM_OP_NA;
 	dse.mem_lvl = PERF_MEM_LVL_NA;
 	if (status & 1)
 		dse.mem_lvl = PERF_MEM_LVL_L1;
-- 
1.8.5.3

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