linux-kernel - Re: [PATCH 1/2] perf, x86: Disallow setting undefined bits for PEBS events

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Date:	Fri, 14 Mar 2014 17:21:37 +0100
From:	Peter Zijlstra <peterz@...radead.org>
To:	Andi Kleen <ak@...ux.intel.com>
Cc:	Andi Kleen <andi@...stfloor.org>, mingo@...nel.org,
	linux-kernel@...r.kernel.org, eranian@...gle.com, acme@...hat.com,
	namhyung@...nel.org, jolsa@...hat.com
Subject: Re: [PATCH 1/2] perf, x86: Disallow setting undefined bits for PEBS
 events

On Fri, Mar 14, 2014 at 06:54:39AM -0700, Andi Kleen wrote:
> On Fri, Mar 14, 2014 at 09:13:38AM +0100, Peter Zijlstra wrote:
> > On Thu, Mar 13, 2014 at 02:22:12PM -0700, Andi Kleen wrote:
> > > From: Andi Kleen <ak@...ux.intel.com>
> > > 
> > > The SDM forbids setting various event qualifiers with PEBS
> > > events. The magic cycles:pp event uses it, but it has caused
> > > problems in the past. We continue allowing it for cycles:pp,
> > > but forbid it for all other events to follow the SDM.
> > 
> > Last time this came up I asked for what kind of problems it caused.
> 
> The original PEBS lockup on Sandy Bridge was caused by these bits.

I reread that thread (non-public sorry) and no; it was a clear hardware
fail there that got INST_RETIRED.ANY_P (0x00c0) retracted as PEBS
capable. It wasn't the extra bits, it would take your machine down just
fine without them.

And the work around suggested by Intel (the one currently in
intel_pebs_alias_snb) also didn't fail because of those extra bits
AFAIK. The thread suggests something else -- but again, that's all
non-public :-(

The very fact that we have Intel sanctioned events with those bits in
says they're not universally bad.

> The person who architected the hardware strongly advised to not
> use them with PEBS events.

That's a non statement; it doesn't contain anything useful, such
statements must be qualified with why he advises against them.

If its purely because the results are not guaranteed; we don't care. We
allow programming all kinds of crap into normal counters too; you get to
keep whatever nonsense the CPU counts.

> Besides we do what the SDM tells us to do. Do you disagree
> with that?

We don't, that thing is plenty wrong.

So stop trying to play the non-information game and state something
concrete already. Then again, frankly I don't trust you anymore so
pretty much anything you say will be doubted.
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/