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Message-ID: <20140317162211.GH6457@e106497-lin.cambridge.arm.com>
Date:	Mon, 17 Mar 2014 16:22:11 +0000
From:	Liviu Dudau <Liviu.Dudau@....com>
To:	Rob Herring <robherring2@...il.com>
Cc:	linux-pci <linux-pci@...r.kernel.org>,
	Bjorn Helgaas <bhelgaas@...gle.com>,
	Catalin Marinas <Catalin.Marinas@....com>,
	Will Deacon <Will.Deacon@....com>,
	Benjamin Herrenschmidt <benh@...nel.crashing.org>,
	linaro-kernel <linaro-kernel@...ts.linaro.org>,
	Arnd Bergmann <arnd@...db.de>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	LKML <linux-kernel@...r.kernel.org>,
	LAKML <linux-arm-kernel@...ts.infradead.org>,
	Tanmay Inamdar <tinamdar@....com>
Subject: Re: [PATCH v7 3/3] arm64: Add architecture support for PCI

On Mon, Mar 17, 2014 at 04:05:38PM +0000, Rob Herring wrote:
> On Fri, Mar 14, 2014 at 10:34 AM, Liviu Dudau <Liviu.Dudau@....com> wrote:
> > Use the generic host bridge functions to provide support for
> > PCI Express on arm64. There is no support for ISA memory.
> >
> > Signed-off-by: Liviu Dudau <Liviu.Dudau@....com>
> > Tested-by: Tanmay Inamdar <tinamdar@....com>
> > ---
> >  arch/arm64/Kconfig            |  19 +++-
> >  arch/arm64/include/asm/Kbuild |   1 +
> >  arch/arm64/include/asm/io.h   |   3 +-
> >  arch/arm64/include/asm/pci.h  |  51 ++++++++++
> >  arch/arm64/kernel/Makefile    |   1 +
> >  arch/arm64/kernel/pci.c       | 173 ++++++++++++++++++++++++++++++++
> >  6 files changed, 246 insertions(+), 2 deletions(-)
> >  create mode 100644 arch/arm64/include/asm/pci.h
> >  create mode 100644 arch/arm64/kernel/pci.c
> 
> [snip]
> 
> > +#endif
> > +
> > +extern unsigned long pci_ioremap_io(const struct resource *res, phys_addr_t phys_addr);
> 
> Can we at least align the function definition across architectures if
> not the implementation.

The choice of names is unfortunate. We are trying to follow the spirit of the
arch/arm function, not the implementation, and for RFC that served the purpose.

I'll come up with a better name as I don't intend to share the implementation
with arch/arm here.

Best regards,
Liviu

> 
> 
> > +int pci_register_io_range(phys_addr_t address, resource_size_t size)
> > +{
> > +       struct ioresource *res;
> > +       resource_size_t allocated_size = 0;
> > +
> > +       /* find if the range has not been already allocated */
> > +       list_for_each_entry(res, &io_list, list) {
> > +               if (address >= res->start &&
> > +                       address + size <= res->start + size)
> > +                       return 0;
> > +               allocated_size += res->size;
> > +       }
> > +
> > +       /* range not already registered, check for space */
> > +       if (allocated_size + size > IO_SPACE_LIMIT)
> 
> I believe this needs to be "allocated_size + size - 1".
> 
> > +               return -E2BIG;
> > +
> 

-- 
====================
| I would like to |
| fix the world,  |
| but they're not |
| giving me the   |
 \ source code!  /
  ---------------
    ¯\_(ツ)_/¯

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