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Message-Id: <26E59402-2F50-4E42-AAF2-AF321CB51799@codeaurora.org>
Date: Mon, 17 Mar 2014 12:33:40 -0500
From: Kumar Gala <galak@...eaurora.org>
To: Christopher Covington <cov@...eaurora.org>
Cc: Stephen Boyd <sboyd@...eaurora.org>,
David Brown <davidb@...eaurora.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-arm-msm@...r.kernel.org" <linux-arm-msm@...r.kernel.org>,
linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH] ARM: dts: msm8974: Move arch-timer out of soc node
On Mar 17, 2014, at 12:31 PM, Christopher Covington <cov@...eaurora.org> wrote:
> Hi Stephen,
>
> On 03/11/2014 05:24 PM, Stephen Boyd wrote:
>> The architected timer is not a register addressable piece of
>> hardware. Instead it's accessed through cp15 accessors. Move it
>> to the root of the devicetree to reflect this.
>
> I find this confusing, perhaps due to overloading of the word "register".
> Aren't CP15's a class of coprocessor _registers_? Could it perhaps be clearer
> to talk about memory-mapped versus CP15-mapped timers?
>
> Is "soc" documented somewhere or is it just a name for a container? Assuming
> the latter, it's not obvious to me why being a child of a system on chip node
> would imply having memory mapped registers.
“soc” is a container, since its compatible = "simple-bus”, this implies memory mapped register access for nodes inside of it.
- k
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