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Message-Id: <1395432521-11055-4-git-send-email-alexandre.belloni@free-electrons.com>
Date:	Fri, 21 Mar 2014 21:08:39 +0100
From:	Alexandre Belloni <alexandre.belloni@...e-electrons.com>
To:	Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>,
	Mike Turquette <mturquette@...aro.org>
Cc:	Jimmy Xu <zmxu@...vell.com>, Jisheng Zhang <jszhang@...vell.com>,
	linux-doc@...r.kernel.org, linux-kernel@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org,
	Antoine Ténart 
	<antoine.tenart@...e-electrons.com>,
	Alexandre Belloni <alexandre.belloni@...e-electrons.com>
Subject: [PATCH v2 3/5] ARM: berlin/dt: add cpupll and syspll support to BG2Q

The Berlin BG2Q has two supported PLLs: CPU PLL and System PLL, add those to the
SoC device tree.

Note that support for the AVPLL is not yet available.

Signed-off-by: Alexandre Belloni <alexandre.belloni@...e-electrons.com>
---
 arch/arm/boot/dts/berlin2q.dtsi | 22 +++++++++++++++-------
 1 file changed, 15 insertions(+), 7 deletions(-)

diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi
index 07452a7483fa..5925e6a16749 100644
--- a/arch/arm/boot/dts/berlin2q.dtsi
+++ b/arch/arm/boot/dts/berlin2q.dtsi
@@ -59,16 +59,10 @@
 		clock-frequency = <100000000>;
 	};
 
-	cpuclk: cpu-clock {
-		compatible = "fixed-clock";
-		#clock-cells = <0>;
-		clock-frequency = <1200000000>;
-	};
-
 	twdclk: twdclk {
 		compatible = "fixed-factor-clock";
 		#clock-cells = <0>;
-		clocks = <&cpuclk>;
+		clocks = <&cpupll>;
 		clock-mult = <1>;
 		clock-div = <3>;
 	};
@@ -101,6 +95,20 @@
 			#interrupt-cells = <3>;
 		};
 
+		cpupll: cpupll@...170 {
+			compatible = "marvell,berlin2q-pll";
+			clocks = <&smclk>;
+			#clock-cells = <0>;
+			reg = <0xdd0170 0x8>;
+		};
+
+		syspll: syspll@...030 {
+			compatible = "marvell,berlin2q-pll";
+			clocks = <&smclk>;
+			#clock-cells = <0>;
+			reg = <0xea0030 0x8>;
+		};
+
 		apb@...000 {
 			compatible = "simple-bus";
 			#address-cells = <1>;
-- 
1.8.3.2

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