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Date:	Fri, 21 Mar 2014 22:36:31 +0100
From:	Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>
To:	Alexandre Belloni <alexandre.belloni@...e-electrons.com>,
	Mike Turquette <mturquette@...aro.org>
CC:	Jimmy Xu <zmxu@...vell.com>, Jisheng Zhang <jszhang@...vell.com>,
	linux-doc@...r.kernel.org, linux-kernel@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org,
	Antoine Ténart 
	<antoine.tenart@...e-electrons.com>
Subject: Re: [PATCH v2 5/5] ARM: berlin/dt: add cpupll and syspll support
 to BG2

On 03/21/2014 09:08 PM, Alexandre Belloni wrote:
> The Berlin BG2 has two supported PLLs: CPU PLL and System PLL, add those to the
> SoC device tree.
>
> This also moves the remaining clocks from the clocks container node to the root.
>
> Signed-off-by: Alexandre Belloni <alexandre.belloni@...e-electrons.com>
> ---
>   arch/arm/boot/dts/berlin2.dtsi | 48 +++++++++++++++++++++++++++---------------
>   1 file changed, 31 insertions(+), 17 deletions(-)
>
> diff --git a/arch/arm/boot/dts/berlin2.dtsi b/arch/arm/boot/dts/berlin2.dtsi
> index 56a1af2f1052..6c080eb6242a 100644
> --- a/arch/arm/boot/dts/berlin2.dtsi
> +++ b/arch/arm/boot/dts/berlin2.dtsi
[...]
> @@ -83,7 +83,21 @@
>   			compatible = "arm,cortex-a9-twd-timer";
>   			reg = <0xad0600 0x20>;
>   			interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
> -			clocks = <&sysclk>;
> +			clocks = <&twdclk>;
> +		};
> +
> +		syspll: syspll@...014 {
> +			compatible = "marvell,berlin2-pll";
> +			clocks = <&smclk>;
> +			#clock-cells = <0>;
> +			reg = <0xea0014 8>;
> +		};
> +
> +		cpupll: cpupll@...03c {
> +			compatible = "marvell,berlin2-pll";
> +			clocks = <&smclk>;
> +			#clock-cells = <0>;
> +			reg = <0xea003c 8>;

Same comment about hex numbers and I'll also fix it up.

Sebastian

>   		};
>
>   		apb@...000 {
>

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