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Message-ID: <CANk1AXRTaCvFn8yemFEq8c2g=zHzz-Kz_B4XgJsSvSjKsu9RrA@mail.gmail.com>
Date: Fri, 21 Mar 2014 17:06:19 -0500
From: delicious quinoa <delicious.quinoa@...il.com>
To: Sebastian Andrzej Siewior <bigeasy@...utronix.de>
Cc: Gerhard Sittig <gsi@...x.de>, Alan Tull <atull@...era.com>,
Linus Walleij <linus.walleij@...aro.org>,
Alexandre Courbot <gnurou@...il.com>,
"linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
linux-kernel <linux-kernel@...r.kernel.org>,
Dinh Nguyen <dinguyen@...era.com>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>
Subject: Re: [PATCH 3/3] ARM: dts: socfpga: add gpio pieces
On Fri, Mar 21, 2014 at 2:10 PM, Sebastian Andrzej Siewior
<bigeasy@...utronix.de> wrote:
> On 03/21/2014 06:24 PM, Gerhard Sittig wrote:
>> On Thu, Mar 20, 2014 at 20:55 +0100, Sebastian Andrzej Siewior wrote:
>>>
>>> The cycloneV has three gpio controllers, each one with 29 gpios. This patch
>>> adds the three controller with the gpio driver which is now sitting the
>>> gpio tree.
>>
>> The third bank should have 27 pins, only the first two have 29.
>
> It is not a bank it is a complete controller. Why 27 pins? The
> reference manual says that there register 0...28.
Hi Sebastian,
The ref manual is wrong. It is 27. The last two aren't pinned out.
Alan Tull
aka
delicious quinoa
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