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Message-ID: <09CB0B4607EB8F4DB7E0BE3B06BFBD0501004D78@SHSMSX101.ccr.corp.intel.com>
Date:	Wed, 26 Mar 2014 08:06:07 +0000
From:	"Wang, Biao" <biao.wang@...el.com>
To:	"hpa@...or.com" <hpa@...or.com>,
	"mingo@...hat.com" <mingo@...hat.com>,
	"tglx@...utronix.de" <tglx@...utronix.de>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
CC:	"Zhang, Di" <di.zhang@...el.com>
Subject: [PATCH] x86: apic: disarm apic timer in deadline mode when shut
 down clockevent

For tsc deadline mode, when we shut down clockevent we should disarm
local-APIC timer like count-down mode.

Signed-off-by: wang, biao <biao.wang@...el.com>
Signed-off-by: Zhang Di <di.zhang@...el.com>
---
 arch/x86/kernel/apic/apic.c |    4 ++++
 1 files changed, 4 insertions(+), 0 deletions(-)

diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index 7f26c9a..85889ba 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -512,6 +512,10 @@ static void lapic_timer_setup(enum clock_event_mode mode,
 		v |= (APIC_LVT_MASKED | LOCAL_TIMER_VECTOR);
 		apic_write(APIC_LVTT, v);
 		apic_write(APIC_TMICT, 0);
+
+		/*disarm timer in deadline mode*/
+		if (boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER))
+			wrmsrl(MSR_IA32_TSC_DEADLINE, 0);
 		break;
 	case CLOCK_EVT_MODE_RESUME:
 		/* Nothing to do here */
-- 
1.7.6
--
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