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Message-ID: <1395842272-15267-10-git-send-email-kishon@ti.com>
Date:	Wed, 26 Mar 2014 19:27:49 +0530
From:	Kishon Vijay Abraham I <kishon@...com>
To:	<devicetree@...r.kernel.org>, <linux-doc@...r.kernel.org>,
	<linux-kernel@...r.kernel.org>,
	<linux-arm-kernel@...ts.infradead.org>,
	<linux-omap@...r.kernel.org>, <linux-pci@...r.kernel.org>,
	<bhelgaas@...gle.com>, <mohit.kumar@...com>, <jg1.han@...sung.com>
CC:	<robh+dt@...nel.org>, <pawel.moll@....com>, <mark.rutland@....com>,
	<ijc+devicetree@...lion.org.uk>, <galak@...eaurora.org>,
	<rob@...dley.net>, <linux@....linux.org.uk>, <tony@...mide.com>,
	<rnayak@...com>, <paul@...an.com>, <kishon@...com>
Subject: [RFC PATCH 09/12] ARM: dts: dra7: Add dt data for PCIe PHY control module

Added dt data for PCIe PHY control module used by PCIe PHY.
The documention for this node can be found @ ../bindings/phy/ti-phy.txt

Signed-off-by: Kishon Vijay Abraham I <kishon@...com>
---
 arch/arm/boot/dts/dra7.dtsi |    8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index f3565ac..73c61d0 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -656,6 +656,14 @@
 			clock-names = "sysclk";
 		};
 
+		omap_control_pcie1phy: omap-control-pciephy@...a003c40 {
+			compatible = "ti,control-phy-pipe3";
+			reg = <0x4a003c40 0x4>;
+			reg-names = "power";
+			clocks = <&sys_clkin1>;
+			clock-names = "sysclk";
+		};
+
 		/* OCP2SCP3 */
 		ocp2scp@...90000 {
 			compatible = "ti,omap-ocp2scp";
-- 
1.7.9.5

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