linux-kernel - Re: [PATCH RFC v4 2/2] clk: Add handling of clk parent and rate assigned from DT

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Message-ID: <5339A036.6090703@codethink.co.uk>
Date:	Mon, 31 Mar 2014 18:04:54 +0100
From:	Ben Dooks <ben.dooks@...ethink.co.uk>
To:	Sylwester Nawrocki <s.nawrocki@...sung.com>,
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
CC:	linux-arm-kernel@...ts.infradead.org, gregkh@...uxfoundation.org,
	mturquette@...aro.org, linux@....linux.org.uk, robh+dt@...nel.org,
	grant.likely@...aro.org, mark.rutland@....com,
	galak@...eaurora.org, kyungmin.park@...sung.com,
	sw0312.kim@...sung.com, m.szyprowski@...sung.com,
	t.figa@...sung.com, laurent.pinchart@...asonboard.com,
	s.hauer@...gutronix.de
Subject: Re: [PATCH RFC v4 2/2] clk: Add handling of clk parent and rate assigned
 from DT

On 31/03/14 17:41, Sylwester Nawrocki wrote:
> This function adds a helper function to configure clock parents and rates
> as specified in clock-parents, clock-rates DT properties for a consumer
> device and a call to it before driver is bound to a device.

[snip]

tree/bindings/clock/clock-bindings.txt 
b/Documentation/devicetree/bindings/clock/clock-bindings.txt
> index 700e7aa..59fbb4e 100644
> --- a/Documentation/devicetree/bindings/clock/clock-bindings.txt
> +++ b/Documentation/devicetree/bindings/clock/clock-bindings.txt
> @@ -132,3 +132,45 @@ clock signal, and a UART.
>     ("pll" and "pll-switched").
>   * The UART has its baud clock connected the external oscillator and its
>     register clock connected to the PLL clock (the "pll-switched" signal)
> +
> +==Assigned clock parents and rates==
> +
> +Some platforms require static initial configuration of parts of the clocks
> +controller. Such a configuration can be specified in a clock consumer node
> +through clock-parents and clock-rates DT properties. The former should
> +contain a list of parent clocks in form of phandle and clock specifier pairs,
> +the latter the list of assigned clock frequency values (one cell each).
> +
> +    uart@...0 {
> +        compatible = "fsl,imx-uart";
> +        reg = <0xa000 0x1000>;
> +        ...
> +        clocks = <&clkcon 0>, <&clkcon 3>;
> +        clock-names = "baud", "mux";
> +
> +        clock-parents = <0>, <&pll 1>;
> +        clock-rates = <460800>;
> +    };
> +
> +In this example the pll is set as parent of "mux" clock and frequency of "baud"
> +clock is specified as 460800 Hz.
> +
> +Configuring a clock parent and rate through the device node that uses
> +the clock can be done only for clocks that have a single user. Specifying
> +conflicting parent or rate configuration in multiple consumer nodes for
> +a shared clock is forbidden.
> +
> +Configuration of common clocks, which affect multiple consumer devices
> +can be specified in a dedicated 'assigned-clocks' subnode of a clock
> +provider node, e.g.:
> +
> +    clkcon {
> +        ...
> +        #clock-cells = <1>;
> +
> +        assigned-clocks {
> +            clocks = <&clkcon 16>, <&clkcon 17>;
> +            clock-parents = <0>, <&clkcon 1>;
> +            clock-rates = <200000>;
> +        };
> +    };

How do you support not-setting a rate for a clock?

[snip code]

-- 
Ben Dooks				http://www.codethink.co.uk/
Senior Engineer				Codethink - Providing Genius
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