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Message-ID: <5B8DA87D05A7694D9FA63FD143655C1B1AFAEBE3@HASMSX106.ger.corp.intel.com>
Date: Mon, 31 Mar 2014 20:39:18 +0000
From: "Winkler, Tomas" <tomas.winkler@...el.com>
To: "gregkh@...uxfoundation.org" <gregkh@...uxfoundation.org>
CC: "arnd@...db.de" <arnd@...db.de>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
stable <stable@...r.kernel.org>,
"Nikola Ciprich" <nikola.ciprich@...uxbox.cz>,
Prarit Bhargava <prarit@...hat.com>
Subject: RE: [char-misc-next] mei: me: do not load the driver if the FW
doesn't support MEI interface
>
> NM and SPS FW types that may run on ME device on server platforms
> do not have valid MEI/HECI interface and driver should not
> be bound to it as this might lead to system hung.
> In practice not all BIOSes effectively hide such devices from the
> OS and in some cases it is not possible.
>
> We determine FW type by examining Host FW status registers in order to
> unbind the driver.
> In this patch we are adding check for ME on Cougar Point, Lynx Point
> Devices
>
> Cc: stable <stable@...r.kernel.org> # 3.10+
> Signed-off-by: Tomas Winkler <tomas.winkler@...el.com>
Please add
Tested-by: Nikola Ciprich <nikola.ciprich@...uxbox.cz>
Also fixes RH issue described in https://bugzilla.redhat.com/show_bug.cgi?id=1080155
Thanks
Tomas
> ---
> drivers/misc/mei/hw-me-regs.h | 5 +++++
> drivers/misc/mei/pci-me.c | 30 +++++++++++++++++++++++-------
> 2 files changed, 28 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/misc/mei/hw-me-regs.h b/drivers/misc/mei/hw-me-regs.h
> index 72ba4d5..a7856c0 100644
> --- a/drivers/misc/mei/hw-me-regs.h
> +++ b/drivers/misc/mei/hw-me-regs.h
> @@ -115,6 +115,11 @@
> #define MEI_DEV_ID_LPT_HR 0x8CBA /* Lynx Point H Refresh */
>
> #define MEI_DEV_ID_WPT_LP 0x9CBA /* Wildcat Point LP */
> +
> +/* Host Firmware Status Registers in PCI Config Space */
> +#define PCI_CFG_HFS_1 0x40
> +#define PCI_CFG_HFS_2 0x48
> +
> /*
> * MEI HW Section
> */
> diff --git a/drivers/misc/mei/pci-me.c b/drivers/misc/mei/pci-me.c
> index bc3e043..88516b0 100644
> --- a/drivers/misc/mei/pci-me.c
> +++ b/drivers/misc/mei/pci-me.c
> @@ -107,15 +107,31 @@ static bool mei_me_quirk_probe(struct pci_dev *pdev,
> const struct pci_device_id *ent)
> {
> u32 reg;
> - if (ent->device == MEI_DEV_ID_PBG_1) {
> - pci_read_config_dword(pdev, 0x48, ®);
> - /* make sure that bit 9 is up and bit 10 is down */
> - if ((reg & 0x600) == 0x200) {
> - dev_info(&pdev->dev, "Device doesn't have valid ME
> Interface\n");
> - return false;
> - }
> + /* Cougar Point || Patsburg */
> + if (ent->device == MEI_DEV_ID_CPT_1 ||
> + ent->device == MEI_DEV_ID_PBG_1) {
> + pci_read_config_dword(pdev, PCI_CFG_HFS_2, ®);
> + /* make sure that bit 9 (NM) is up and bit 10 (DM) is down */
> + if ((reg & 0x600) == 0x200)
> + goto no_mei;
> }
> +
> + /* Lynx Point */
> + if (ent->device == MEI_DEV_ID_LPT_H ||
> + ent->device == MEI_DEV_ID_LPT_W ||
> + ent->device == MEI_DEV_ID_LPT_HR) {
> + /* Read ME FW Status check for SPS Firmware */
> + pci_read_config_dword(pdev, PCI_CFG_HFS_1, ®);
> + /* if bits [19:16] = 15, running SPS Firmware */
> + if ((reg & 0xf0000) == 0xf0000)
> + goto no_mei;
> + }
> +
> return true;
> +
> +no_mei:
> + dev_info(&pdev->dev, "Device doesn't have valid ME Interface\n");
> + return false;
> }
> /**
> * mei_probe - Device Initialization Routine
> --
> 1.8.5.3
--
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