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Date: Fri, 04 Apr 2014 12:02:13 +0200
From: Michal Simek <monstr@...str.eu>
To: sourav <sourav.poddar@...com>
CC: Harini Katakam <harinik@...inx.com>, broonie@...nel.org,
grant.likely@...aro.org, robh+dt@...nel.org, pawel.moll@....com,
mark.rutland@....com, ijc+devicetree@...lion.org.uk,
galak@...eaurora.org, linux-spi@...r.kernel.org,
linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
linux-doc@...r.kernel.org
Subject: Re: [PATCH v2 1/2] SPI: Add driver for Cadence SPI controller
Hi Sourav
On 04/04/2014 11:24 AM, sourav wrote:
> HI,
> On Friday 04 April 2014 02:34 PM, sourav wrote:
>> Hi Harini,
>> On Thursday 03 April 2014 04:40 PM, Harini Katakam wrote:
>>> Add driver for Cadence SPI controller. This is used in Xilinx Zynq.
>>>
>>> Signed-off-by: Harini Katakam<harinik@...inx.com>
>>> ---
>> I had looked at cadence qspi controller. What I can see is that your
>> patch implements "normal spi ode of operation" ? and the patch looks fine.
>> But, to avail the maximum throughput, I see cadence qspi supports
>> direct/indirect mode of operations, as well as read data capture logic.
>>
>> So, do you intent to add any of the above in your driver?
>>
> Looks like, I got a bit confused. This is not cadence QSPI controller but only SPI controller.
> Sorry for the noise.
Look at this one
http://www.spinics.net/lists/kernel/msg1716894.html
Thanks,
Michal
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform
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