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Message-ID: <877g71jdl8.fsf@tassilo.jf.intel.com>
Date: Mon, 07 Apr 2014 09:42:27 -0700
From: Andi Kleen <andi@...stfloor.org>
To: ling.ma.program@...il.com
Cc: mingo@...hat.com, tglx@...utronix.de, hpa@...or.com,
neleai@...nam.cz, linux-kernel@...r.kernel.org,
Ling Ma <ling.ml@...baba-inc.com>
Subject: Re: [PATCH RFC] x86:Improve memset with general 64bit instruction
ling.ma.program@...il.com writes:
> From: Ling Ma <ling.ml@...baba-inc.com>
>
> In this patch we manage to reduce miss branch prediction by
> avoiding using branch instructions and force destination to be aligned
> with general 64bit instruction.
> Below compared results shows we improve performance up to 1.8x
> (We modified test suit from Ondra, send after this patch)
You didn't specify the CPU?
I assume it's some Atom, as nothing else uses these open coded functions
anymore?
-Andi
--
ak@...ux.intel.com -- Speaking for myself only
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