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Message-ID: <CAPdUM4NhP-gcA2CYVEYBzEPztSozmFKjB8X9ep-_MNE7q+ZhkQ@mail.gmail.com>
Date: Wed, 9 Apr 2014 16:16:31 +0530
From: Rahul Sharma <r.sh.open@...il.com>
To: Andrzej Hajda <a.hajda@...sung.com>
Cc: Tomasz Stanislawski <t.stanislaws@...sung.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
linux-samsung-soc <linux-samsung-soc@...r.kernel.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"linux-media@...r.kernel.org" <linux-media@...r.kernel.org>,
"dri-devel@...ts.freedesktop.org" <dri-devel@...ts.freedesktop.org>,
Kukjin Kim <kgene.kim@...sung.com>,
Kishon Vijay Abraham I <kishon@...com>,
Kyungmin Park <kyungmin.park@...sung.com>,
Rob Herring <robh+dt@...nel.org>,
Grant Likely <grant.likely@...aro.org>,
Sylwester Nawrocki <sylvester.nawrocki@...il.com>,
Rahul Sharma <rahul.sharma@...sung.com>,
sunil joshi <joshi@...sung.com>
Subject: Re: [PATCHv2 2/3] drm: exynos: hdmi: use hdmiphy as PHY
Hi Andrzej,
On 9 April 2014 16:00, Andrzej Hajda <a.hajda@...sung.com> wrote:
> Hi Tomasz,
>
> On 04/08/2014 04:37 PM, Tomasz Stanislawski wrote:
>> The HDMIPHY (physical interface) is controlled by a single
>> bit in a power controller's regiter. It was implemented
>> as clock. It was a simple but effective hack.
>
> This power controller register has also bits to control HDMI clock
> divider ratio. I guess current drivers do not change it, but how do you
> want to implement access to it if some HDMI driver in the future will
> need to change ratio. I guess in case of clk it would be easier.
If it is really required to change this divider, it should be registered as
a clock provider in clock driver exposing single divider clock.
Regards,
Rahul Sharma
>
> Regards
> Andrzej
>
>
> _______________________________________________
> dri-devel mailing list
> dri-devel@...ts.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/dri-devel
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