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Message-id: <1397124377-16969-7-git-send-email-cw00.choi@samsung.com>
Date: Thu, 10 Apr 2014 19:06:05 +0900
From: Chanwoo Choi <cw00.choi@...sung.com>
To: kgene.kim@...sung.com, t.figa@...sung.com,
linux-samsung-soc@...r.kernel.org
Cc: kyungmin.park@...sung.com, cw00.choi@...sung.com,
inki.dae@...sung.com, sw0312.kim@...sung.com,
hyunhee.kim@...sung.com, yj44.cho@...sung.com,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org
Subject: [PATCH 15/27] ARM: dts: exynos3250: Add uart dt node to support seiral
ports
This patch add UART dt node for Exynos3250. Exynos3250 uses same UART IP
of Exynos4 SoC and has only two independent channels.
Signed-off-by: Chanwoo Choi <cw00.choi@...sung.com>
[Fix incorrect clock id by Tomasz Figa]
Signed-off-by: Tomasz Figa <t.figa@...sung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@...sung.com>
---
arch/arm/boot/dts/exynos3250.dtsi | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi
index 758913e..d17ed54 100644
--- a/arch/arm/boot/dts/exynos3250.dtsi
+++ b/arch/arm/boot/dts/exynos3250.dtsi
@@ -74,4 +74,22 @@
reg = <0x11400000 0x1000>;
interrupts = <0 240 0>;
};
+
+ serial@...00000 {
+ compatible = "samsung,exynos4210-uart";
+ reg = <0x13800000 0x100>;
+ interrupts = <0 109 0>;
+ clocks = <&cmu CLK_UART0>, <&cmu CLK_SCLK_UART0>;
+ clock-names = "uart", "clk_uart_baud0";
+ status = "disabled";
+ };
+
+ serial@...10000 {
+ compatible = "samsung,exynos4210-uart";
+ reg = <0x13810000 0x100>;
+ interrupts = <0 110 0>;
+ clocks = <&cmu CLK_UART1>, <&cmu CLK_SCLK_UART1>;
+ clock-names = "uart", "clk_uart_baud0";
+ status = "disabled";
+ };
};
--
1.8.0
--
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