lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-id: <5347391E.7010201@samsung.com>
Date:	Fri, 11 Apr 2014 09:36:46 +0900
From:	Chanwoo Choi <cw00.choi@...sung.com>
To:	Marc Zyngier <marc.zyngier@....com>
Cc:	"kgene.kim@...sung.com" <kgene.kim@...sung.com>,
	"t.figa@...sung.com" <t.figa@...sung.com>,
	"linux-samsung-soc@...r.kernel.org" 
	<linux-samsung-soc@...r.kernel.org>,
	"hyunhee.kim@...sung.com" <hyunhee.kim@...sung.com>,
	"sw0312.kim@...sung.com" <sw0312.kim@...sung.com>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"yj44.cho@...sung.com" <yj44.cho@...sung.com>,
	"inki.dae@...sung.com" <inki.dae@...sung.com>,
	"kyungmin.park@...sung.com" <kyungmin.park@...sung.com>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH 06/27] ARM: EXYNOS:: Enter a15 lowpower mode for Exynos3250
 based on Cortex-a7

On 04/10/2014 09:07 PM, Marc Zyngier wrote:
> On Thu, Apr 10 2014 at 11:56:33 am BST, Chanwoo Choi <cw00.choi@...sung.com> wrote:
>> On 04/10/2014 06:51 PM, Marc Zyngier wrote:
>>> On Thu, Apr 10 2014 at 10:28:23 am BST, Chanwoo Choi <cw00.choi@...sung.com> wrote:
>>>> This patch decide proper lowpower mode of either a15 or a9 according to own ID
>>>> from Main ID register.
>>>>
>>>> Signed-off-by: Chanwoo Choi <cw00.choi@...sung.com>
>>>> Signed-off-by: Kyungmin Park <kyungmin.park@...sung.com>
>>>> ---
>>>>  arch/arm/mach-exynos/hotplug.c | 13 ++++++++++---
>>>>  1 file changed, 10 insertions(+), 3 deletions(-)
>>>>
>>>> diff --git a/arch/arm/mach-exynos/hotplug.c b/arch/arm/mach-exynos/hotplug.c
>>>> index 5eead53..36d3db6 100644
>>>> --- a/arch/arm/mach-exynos/hotplug.c
>>>> +++ b/arch/arm/mach-exynos/hotplug.c
>>>> @@ -135,13 +135,20 @@ void __ref exynos_cpu_die(unsigned int cpu)
>>>>  	int primary_part = 0;
>>>>  
>>>>  	/*
>>>> -	 * we're ready for shutdown now, so do it.
>>>> -	 * Exynos4 is A9 based while Exynos5 is A15; check the CPU part
>>>> +	 * we're ready for shutdown now, so do it. Exynos4 is A9 based
>>>> +	 * while Exynos5 is A15/Exynos7 is A7; check the CPU part
>>>>  	 * number by reading the Main ID register and then perform the
>>>>  	 * appropriate sequence for entering low power.
>>>>  	 */
>>>>  	asm("mrc p15, 0, %0, c0, c0, 0" : "=r"(primary_part) : : "cc");
>>>
>>> While you're touching that code, how about using:
>>>
>>>       primary_part = read_cpuid(CPUID_ID);
>>
>> Or, 
>> I suggest read_cpuid_part_number() instead of assembler directly.
>>
>> 	primary_part = read_cpuid_part_number();
> 
> Yup, even better.
> 
>>>
>>>> -	if ((primary_part & 0xfff0) == 0xc0f0)
>>>> +
>>>> +	/*
>>>> +	 * Main ID register of Cortex series
>>>> +	 * - Cortex-a7  : 0x410F_C07x
>>>> +	 * - Cortex-a15 : 0x410F_C0Fx
>>>> +	 */
>>>> +	primary_part = primary_part & 0xfff0;
>>>> +	if (primary_part == 0xc0f0 || primary_part == 0xc070)
>>>
>>> ARM_CPU_PART_CORTEX_A15, ARM_CPU_PART_CORTEX_A7
>>
>> OK I'll use this defined constant as following:
>>
>> 	switch (primary_part)
>> 	case ARM_CPU_PART_CORTEX_A7:
>> 	case ARM_CPU_PART_CORTEX_A15:
>> 		cpu_enter_lowpower_a15();
>> 		break;
>> 	default:
>> 		cpu_enter_lowpower_a9();
>> 		break;
>> 	}
> 
> Looks good.
> 

Thanks for your review.

Best Regards,
Chanwoo Choi

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ