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Message-Id: <201404142028.00366.marex@denx.de>
Date: Mon, 14 Apr 2014 20:28:00 +0200
From: Marek Vasut <marex@...x.de>
To: Harini Katakam <harinikatakamlinux@...il.com>
Cc: grmoore@...era.com, ggrahammoore@...il.com,
Geert Uytterhoeven <geert+renesas@...ux-m68k.org>,
Artem Bityutskiy <artem.bityutskiy@...ux.intel.com>,
Sascha Hauer <s.hauer@...gutronix.de>,
Jingoo Han <jg1.han@...sung.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Yves Vandervennet <rocket.yvanderv@...il.com>,
linux-mtd@...ts.infradead.org,
Insop Song <insop.song@...nspeed.com>,
Alan Tull <atull@...era.com>,
Sourav Poddar <sourav.poddar@...com>,
Brian Norris <computersforpeace@...il.com>,
David Woodhouse <dwmw2@...radead.org>,
Dinh Nguyen <dinguyen@...era.com>
Subject: Re: [PATCH V2] Add support for flag status register on Micron chips.
On Monday, April 14, 2014 at 05:41:34 PM, Harini Katakam wrote:
> Hi,
>
> On Fri, Apr 11, 2014 at 8:33 PM, <grmoore@...era.com> wrote:
> > From: Graham Moore <grmoore@...era.com>
> >
> > Some new Micron flash chips require reading the flag
> > status register to determine when operations have completed.
> >
> > Furthermore, chips with multi-die stacks of the 65nm 256Mb QSPI also
> > require reading the status register before reading the flag status
> > register.
> >
> > This patch adds support for the flag status register in the n25q512a1 and
> > n25q00 Micron QSPI flash chips.
> >
> > Signed-off-by: Graham Moore <grmoore@...era.com>
>
> <snip>
>
> > #define INFO(_jedec_id, _ext_id, _sector_size, _n_sectors, _flags) \
> >
> > @@ -941,6 +999,8 @@ static const struct spi_device_id m25p_ids[] = {
> >
> > { "n25q128a13", INFO(0x20ba18, 0, 64 * 1024, 256, 0) },
> > { "n25q256a", INFO(0x20ba19, 0, 64 * 1024, 512, SECT_4K) },
> > { "n25q512a", INFO(0x20bb20, 0, 64 * 1024, 1024, SECT_4K) },
> >
> > + { "n25q512a1", INFO(0x20ba20, 0, 64 * 1024, 1024, USE_FSR) },
> > + { "n25q00", INFO(0x20ba21, 0, 64 * 1024, 2048, USE_FSR) },
>
> I understand that "n25q512a1" was added to distinguish between
> 0x20bb20 and 0x20ba20,
> which is essentially 1.8V and 3V parts.
> (The actual part numbers are n25q512a11 and n25q512a13 respectively)
> But USE_FSR is required for both parts.
Thanks for noticing it, n25q512aX must be aligned with the other parts' naming
scheme as that's the naming scheme used in micron datasheets.
> Sorry for posting this question here but it seemed relevant:
> When such devices differ only in supply voltages (and return different
> response to READ ID),
> which we don't act on, is there a way to use the same string?
No, they are different chips, so we must not use the same string.
Best regards,
Marek Vasut
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