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Message-ID: <20140414213148.GN24070@n2100.arm.linux.org.uk>
Date:	Mon, 14 Apr 2014 22:31:48 +0100
From:	Russell King - ARM Linux <linux@....linux.org.uk>
To:	Philipp Zabel <p.zabel@...gutronix.de>
Cc:	devel@...verdev.osuosl.org,
	Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
	dri-devel@...ts.freedesktop.org, linux-kernel@...r.kernel.org,
	kernel@...gutronix.de
Subject: Re: [PATCH 0/7] Reorder i.MX IPU display enable/disable sequence

On Mon, Apr 14, 2014 at 05:21:28PM +0200, Philipp Zabel wrote:
> Repeatedly enabling and disabling the display currently can lead to a state
> in which the IPU doesn't produce a valid signal anymore because we disable
> IPU submodules before they can finish their interaction.

I'm afraid to say that after adding these patches, I find that when Xorg
starts, the thing appears to lock up.

Bisecting points at:

imx-drm: ipu-dc: Wait for DC_FC_1 / DP_SF_END interrupt

being the culpret - booting with the patches up to and including:

imx-drm: ipu-dmfc: Wait for FIFOs to run empty before disabling

works fine.

-- 
FTTC broadband for 0.8mile line: now at 9.7Mbps down 460kbps up... slowly
improving, and getting towards what was expected from it.
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