linux-kernel - Re: [PATCH 2/5] ARM: dts: Device tree for AXM55xx.

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Message-ID: <534D294D.7000201@arm.com>
Date:	Tue, 15 Apr 2014 13:42:53 +0100
From:	Marc Zyngier <marc.zyngier@....com>
To:	Anders Berg <anders.berg@....com>
CC:	"arnd@...db.de" <arnd@...db.de>, "olof@...om.net" <olof@...om.net>,
	"mturquette@...aro.org" <mturquette@...aro.org>,
	Mark Rutland <Mark.Rutland@....com>,
	"dbaryshkov@...il.com" <dbaryshkov@...il.com>,
	"linus.walleij@...aro.org" <linus.walleij@...aro.org>,
	"linux@....linux.org.uk" <linux@....linux.org.uk>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH 2/5] ARM: dts: Device tree for AXM55xx.

Hi Anders,

On 15/04/14 13:06, Anders Berg wrote:
> Add device tree for the Amarillo validation board with an AXM5516 SoC.
> 
> Signed-off-by: Anders Berg <anders.berg@....com>
> ---
>  arch/arm/boot/dts/Makefile             |   1 +
>  arch/arm/boot/dts/axm5516-amarillo.dts |  51 ++++++
>  arch/arm/boot/dts/axm5516-cpus.dtsi    | 204 ++++++++++++++++++++++
>  arch/arm/boot/dts/axm55xx.dtsi         | 306 +++++++++++++++++++++++++++++++++
>  4 files changed, 562 insertions(+)
>  create mode 100644 arch/arm/boot/dts/axm5516-amarillo.dts
>  create mode 100644 arch/arm/boot/dts/axm5516-cpus.dtsi
>  create mode 100644 arch/arm/boot/dts/axm55xx.dtsi
> 

[...]

> +       gic: interrupt-controller@...1001000 {
> +               compatible = "arm,cortex-a15-gic";
> +               #interrupt-cells = <3>;
> +               #address-cells = <0>;
> +               interrupt-controller;
> +               reg = <0x20 0x01001000 0 0x1000>,
> +                     <0x20 0x01002000 0 0x1000>,
> +                     <0x20 0x01004000 0 0x2000>,
> +                     <0x20 0x01006000 0 0x2000>;
> +               interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
> +                               IRQ_TYPE_LEVEL_HIGH)>;
> +       };

Given how many CPUs this system has, what's the catch regarding the GIC?
Is there a second one shadowing this one at the same address for another
set of 8 CPUs? Is there an additional mechanism to IPI the other CPUs?

Thanks,

	M.
-- 
Jazz is not dead. It just smells funny...
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