linux-kernel - Re: [PATCHv3 2/2] iio: devicetree: Add DT binding documentation for Exynos3250 ADC

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Date:	Thu, 17 Apr 2014 20:52:17 +0900
From:	Chanwoo Choi <cw00.choi@...sung.com>
To:	Tomasz Figa <t.figa@...sung.com>
Cc:	jic23@...nel.org, ch.naveen@...sung.com, kgene.kim@...sung.com,
	robh+dt@...nel.org, pawel.moll@....com, mark.rutland@....com,
	ijc+devicetree@...lion.org.uk, galak@...eaurora.org,
	rdunlap@...radead.org, sachin.kamat@...aro.org,
	linux-iio@...r.kernel.org, linux-samsung-soc@...r.kernel.org,
	linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
	devicetree@...r.kernel.org, linux-doc@...r.kernel.org
Subject: Re: [PATCHv3 2/2] iio: devicetree: Add DT binding documentation for
 Exynos3250 ADC

Hi Tomasz,

On 04/16/2014 08:49 PM, Tomasz Figa wrote:
> Hi Chanwoo,
> 
> On 16.04.2014 12:11, Chanwoo Choi wrote:
>> This patch add DT binding documentation for Exynos3250 ADC IP. Exynos3250 has
>> special clock ('sclk_tsadc') for ADC which provide clock to internal ADC.
>>
>> Cc: Rob Herring <robh+dt@...nel.org>
>> Cc: Pawel Moll <pawel.moll@....com>
>> Cc: Mark Rutland <mark.rutland@....com>
>> Cc: Ian Campbell <ijc+devicetree@...lion.org.uk>
>> Cc: Kumar Gala <galak@...eaurora.org>
>> Cc: Randy Dunlap <rdunlap@...radead.org>
>> Cc: Kukjin Kim <kgene.kim@...sung.com>
>> Cc: Naveen Krishna Chatradhi <ch.naveen@...sung.com>
>> Cc: Tomasz Figa <t.figa@...sung.com>
>> Signed-off-by: Chanwoo Choi <cw00.choi@...sung.com>
>> Acked-by: Kyungmin Park <kyungmin.park@...sung.com>
>> ---
>>   .../devicetree/bindings/arm/samsung/exynos-adc.txt   | 20 ++++++++++++++++++++
>>   1 file changed, 20 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt b/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
>> index 5d49f2b..7532ec3 100644
>> --- a/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
>> +++ b/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
>> @@ -14,6 +14,8 @@ Required properties:
>>                   for exynos4412/5250 controllers.
>>               Must be "samsung,exynos-adc-v2" for
>>                   future controllers.
>> +            Must be "samsung,exynos-adc-v3" for
>> +                for exynos3250 controllers.
> 
> I don't think adc-v3 is correct here. It looks like a normal V2 with additional special clock input. Possibly "samsung,exynos3250-adc-v2" or "samsung,exynos-adc-v2-sclk" would be better choices.

OK, I'll fix it with following compatible
- "samsung,exynos-adc-v2-sclk"

> 
>>   - reg:            Contains ADC register address range (base address and
>>               length) and the address of the phy enable register.
>>   - interrupts:         Contains the interrupt information for the timer. The
>> @@ -21,7 +23,11 @@ Required properties:
>>               the Samsung device uses.
>>   - #io-channel-cells = <1>; As ADC has multiple outputs
>>   - clocks        From common clock binding: handle to adc clock.
>> +            From common clock binding: handle to sclk_tsadc clock
>> +            if using Exynos3250.
>>   - clock-names        From common clock binding: Shall be "adc".
>> +            From common clock binding: Shall be "sclk_tsadc"
>> +            if using Exynos3250.
>>   - vdd-supply        VDD input supply.
>>
>>   Note: child nodes can be added for auto probing from device tree.
>> @@ -41,6 +47,20 @@ adc: adc@...10000 {
>>       vdd-supply = <&buck5_reg>;
>>   };
>>
>> +If Exynos3250 uses ADC,
> 
> Please keep proper formatting:
> 
> Example: Node for ADC of Exynos3250 with additional special clock

Thanks, I'll fix it.

Best regards,
Chanwoo Choi
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