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Message-ID: <CA+iBjpR=CYd5JRs6u+BCbqicjoMqRwFRFRS7OFxOrYjetg5mgQ@mail.gmail.com>
Date:	Tue, 22 Apr 2014 13:48:21 -0500
From:	Graham Moore <ggrahammoore@...il.com>
To:	Marek Vasut <marex@...x.de>
Cc:	Graham Moore <grmoore@...era.com>,
	David Woodhouse <dwmw2@...radead.org>,
	Brian Norris <computersforpeace@...il.com>,
	Artem Bityutskiy <artem.bityutskiy@...ux.intel.com>,
	Sourav Poddar <sourav.poddar@...com>,
	Sascha Hauer <s.hauer@...gutronix.de>,
	Geert Uytterhoeven <geert+renesas@...ux-m68k.org>,
	Jingoo Han <jg1.han@...sung.com>,
	Insop Song <insop.song@...nspeed.com>,
	linux-mtd@...ts.infradead.org, linux-kernel@...r.kernel.org,
	Alan Tull <atull@...era.com>,
	Dinh Nguyen <dinguyen@...era.com>,
	Yves Vandervennet <rocket.yvanderv@...il.com>
Subject: Re: [PATCH V3] Add support for flag status register on Micron chips.

On Tue, Apr 22, 2014 at 11:55 AM, Marek Vasut <marex@...x.de> wrote:
> Are you sure the n25q512a doesn't use FSR ? Do n25q512a{1,8}3 share the same
> IDs?

I looked at the datasheet and the n25q512a *does* have the same FSR
usage note, so I suppose I should add USE_FSR to it as well.  But how
is it working now?  Maybe nobody is actually using that chip.
Yes, n25q512a{1,8}3 share the same id, 0x20ba20.
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